diff options
| -rw-r--r-- | arch/mips/Kconfig | 9 | ||||
| -rw-r--r-- | arch/mips/cpu/start.S | 5 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index eb00ee71bc2..652e6a993e8 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -270,6 +270,15 @@ config MIPS_CACHE_INDEX_BASE Normally this is CKSEG0. If the MIPS system needs to move this block to some SRAM or ScratchPad RAM, adapt this option accordingly. +config MIPS_MACH_EARLY_INIT + bool "Enable mach specific very early init code" + help + Use this to enable the call to mips_mach_early_init() very early + from start.S. This function can be used e.g. to do some very early + CPU / SoC intitialization or image copying. Its called very early + and at this stage the PC might not match the linking address + (CONFIG_TEXT_BASE) - no absolute jump done until this call. + config MIPS_CACHE_SETUP bool "Allow generic start code to initialize and setup caches" default n if SKIP_LOWLEVEL_INIT diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index e22771715c1..d0c412236dd 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -236,6 +236,11 @@ wr_done: # endif #endif +#ifdef CONFIG_MIPS_MACH_EARLY_INIT + bal mips_mach_early_init + nop +#endif + #ifdef CONFIG_MIPS_CACHE_SETUP /* Initialize caches... */ PTR_LA t9, mips_cache_reset |