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-rw-r--r--board/freescale/ls1043ardb/ls1043ardb.c44
-rw-r--r--configs/ls1043ardb_SECURE_BOOT_defconfig1
-rw-r--r--configs/ls1043ardb_defconfig1
-rw-r--r--configs/ls1043ardb_nand_SECURE_BOOT_defconfig1
-rw-r--r--configs/ls1043ardb_nand_defconfig1
-rw-r--r--configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig1
-rw-r--r--configs/ls1043ardb_sdcard_defconfig1
-rw-r--r--configs/ls1043ardb_tfa_SECURE_BOOT_defconfig1
-rw-r--r--configs/ls1043ardb_tfa_defconfig1
-rw-r--r--include/configs/ls1043ardb.h5
10 files changed, 55 insertions, 2 deletions
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 002869f4352..f388eb496f4 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2015 Freescale Semiconductor, Inc.
- * Copyright 2021 NXP
+ * Copyright 2021-2022 NXP
*/
#include <common.h>
@@ -272,6 +272,39 @@ void fdt_del_qe(void *blob)
}
}
+/* Update the address of the Aquantia PHY on the MDIO bus for boards revision
+ * v7.0 and up. Also rename the PHY node to align with the address change.
+ */
+void fdt_fixup_phy_addr(void *blob)
+{
+ const char phy_path[] =
+ "/soc/fman@1a00000/mdio@fd000/ethernet-phy@1";
+ int ret, offset, new_addr = AQR113C_PHY_ADDR;
+ char new_name[] = "ethernet-phy@00";
+
+ if (CPLD_READ(pcba_ver) < 0x7)
+ return;
+
+ offset = fdt_path_offset(blob, phy_path);
+ if (offset < 0) {
+ printf("ethernet-phy@1 node not found in the dts\n");
+ return;
+ }
+
+ ret = fdt_setprop_u32(blob, offset, "reg", new_addr);
+ if (ret < 0) {
+ printf("Unable to set 'reg' for node ethernet-phy@1: %s\n",
+ fdt_strerror(ret));
+ return;
+ }
+
+ sprintf(new_name, "ethernet-phy@%x", new_addr);
+ ret = fdt_set_name(blob, offset, new_name);
+ if (ret < 0)
+ printf("Unable to rename node ethernet-phy@1: %s\n",
+ fdt_strerror(ret));
+}
+
int ft_board_setup(void *blob, struct bd_info *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
@@ -290,6 +323,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
#ifndef CONFIG_DM_ETH
fdt_fixup_fman_ethernet(blob);
#endif
+ fdt_fixup_phy_addr(blob);
#endif
fdt_fixup_icid(blob);
@@ -313,6 +347,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
+#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
+int board_fix_fdt(void *blob)
+{
+ fdt_fixup_phy_addr(blob);
+ return 0;
+}
+#endif
+
u8 flash_read8(void *addr)
{
return __raw_readb(addr + 1);
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 0a40bf0f9f9..cc067565dc8 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -12,6 +12,7 @@ CONFIG_SYS_I2C_MXC_I2C4=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FSL_LS_PPA=y
+CONFIG_OF_BOARD_FIXUP=y
CONFIG_NXP_ESBC=y
CONFIG_LAYERSCAPE_NS_ACCESS=y
CONFIG_PCIE1=y
diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index f27eadf3921..7b6080ec801 100644
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FSL_LS_PPA=y
CONFIG_ENV_ADDR=0x60300000
+CONFIG_OF_BOARD_FIXUP=y
CONFIG_LAYERSCAPE_NS_ACCESS=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index da23382940f..83474072b4f 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -14,6 +14,7 @@ CONFIG_FSL_LS_PPA=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_FIXUP=y
CONFIG_NXP_ESBC=y
CONFIG_LAYERSCAPE_NS_ACCESS=y
CONFIG_PCIE1=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index 2be08bbb7b3..5402fbb4a76 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -19,6 +19,7 @@ CONFIG_FSL_LS_PPA=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_FIXUP=y
CONFIG_LAYERSCAPE_NS_ACCESS=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index d9b841df1a4..baac67f6448 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -15,6 +15,7 @@ CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_FIXUP=y
CONFIG_NXP_ESBC=y
CONFIG_LAYERSCAPE_NS_ACCESS=y
CONFIG_PCIE1=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index 79feb55dfb1..ee9b886b190 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -20,6 +20,7 @@ CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_OF_BOARD_FIXUP=y
CONFIG_LAYERSCAPE_NS_ACCESS=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
index 3aafd103df3..1adf26547bb 100644
--- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_OF_BOARD_FIXUP=y
CONFIG_NXP_ESBC=y
CONFIG_LAYERSCAPE_NS_ACCESS=y
CONFIG_PCIE1=y
diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index f9cb304ba1c..78a383be3bb 100644
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
CONFIG_ENV_ADDR=0x60500000
+CONFIG_OF_BOARD_FIXUP=y
CONFIG_LAYERSCAPE_NS_ACCESS=y
CONFIG_PCIE1=y
CONFIG_PCIE2=y
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index d36b2c7e557..ff5da5d2754 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2015 Freescale Semiconductor
+ * Copyright 2022 NXP
*/
#ifndef __LS1043ARDB_H__
@@ -206,7 +207,9 @@
#define QSGMII_PORT3_PHY_ADDR 0x6
#define QSGMII_PORT4_PHY_ADDR 0x7
-#define FM1_10GEC1_PHY_ADDR 0x1
+/* The AQR PHY model and MDIO address differ between board revisions */
+#define FM1_10GEC1_PHY_ADDR 0x1 /* AQR105 on boards up to v6.0 */
+#define AQR113C_PHY_ADDR 0x8 /* AQR113C on boards v7.0 and up */
#endif
#endif