diff options
-rw-r--r-- | arch/x86/Kconfig | 10 | ||||
-rw-r--r-- | arch/x86/cpu/coreboot/Kconfig | 2 | ||||
-rw-r--r-- | arch/x86/cpu/coreboot/coreboot.c | 2 | ||||
-rw-r--r-- | arch/x86/lib/zimage.c | 2 | ||||
-rw-r--r-- | board/coreboot/coreboot/MAINTAINERS | 5 | ||||
-rw-r--r-- | configs/coreboot64-no-spl_defconfig | 62 | ||||
-rw-r--r-- | include/config_distro_bootcmd.h | 2 |
7 files changed, 80 insertions, 5 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 006a59d6fa6..dc9483ad723 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -30,7 +30,7 @@ config X86_RUN_32BIT arch_phys_memset() can be used for basic access to other memory. config X86_RUN_64BIT - bool "64-bit" + bool "32-bit SPL followed by 64-bit U-Boot" select X86_64 select SPL if !EFI_APP select SPL_SEPARATE_BSS if !EFI_APP @@ -40,6 +40,14 @@ config X86_RUN_64BIT runs through the 16-bit and 32-bit init, then switches to 64-bit mode and jumps to U-Boot proper. +config X86_RUN_64BIT_NO_SPL + bool "64-bit" + select X86_64 + help + Build U-Boot as a 64-bit binary without SPL. As U-Boot enters + in 64-bit mode, the assumption is that the silicon is fully + initialized (MP, page tables, etc.). + endchoice config X86_64 diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig index 085302c0482..66f25533b97 100644 --- a/arch/x86/cpu/coreboot/Kconfig +++ b/arch/x86/cpu/coreboot/Kconfig @@ -26,7 +26,7 @@ config SYS_COREBOOT imply CBMEM_CONSOLE imply X86_TSC_READ_BASE imply USE_PREBOOT - select BINMAN if X86_64 + select BINMAN if X86_RUN_64BIT select SYSINFO imply SYSINFO_EXTRA diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index fa7430b436f..d0719d1a405 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -22,7 +22,7 @@ int arch_cpu_init(void) { int ret; - ret = IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() : + ret = IS_ENABLED(CONFIG_X86_64) ? x86_cpu_reinit_f() : x86_cpu_init_f(); if (ret) return ret; diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 65bccdae9b2..8f1c18eaadc 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -423,7 +423,7 @@ int zboot_go(struct bootm_info *bmi) entry = bmi->load_address; image_64bit = false; - if (IS_ENABLED(CONFIG_X86_RUN_64BIT) && + if (IS_ENABLED(CONFIG_X86_64) && (hdr->xloadflags & XLF_KERNEL_64)) { image_64bit = true; } diff --git a/board/coreboot/coreboot/MAINTAINERS b/board/coreboot/coreboot/MAINTAINERS index d97383c030c..5166e7a762d 100644 --- a/board/coreboot/coreboot/MAINTAINERS +++ b/board/coreboot/coreboot/MAINTAINERS @@ -8,3 +8,8 @@ COREBOOT64 BOARD M: Simon Glass <sjg@chromium.org> S: Maintained F: configs/coreboot64_defconfig + +COREBOOT64 NO SPL +M: Jeremy Compostella <jeremy.compostella@intel.com> +S: Maintained +F: configs/coreboot64-no-spl_defconfig diff --git a/configs/coreboot64-no-spl_defconfig b/configs/coreboot64-no-spl_defconfig new file mode 100644 index 00000000000..dd07524560b --- /dev/null +++ b/configs/coreboot64-no-spl_defconfig @@ -0,0 +1,62 @@ +CONFIG_X86=y +CONFIG_TEXT_BASE=0x1110000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_NR_DRAM_BANKS=8 +CONFIG_ENV_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="coreboot" +CONFIG_PRE_CON_BUF_ADDR=0x100000 +CONFIG_X86_RUN_64BIT_NO_SPL=y +CONFIG_VENDOR_COREBOOT=y +CONFIG_TARGET_COREBOOT=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_BOOTSTD_FULL=y +CONFIG_BOOTSTD_DEFAULTS=y +CONFIG_SYS_MONITOR_BASE=0x01110000 +CONFIG_SHOW_BOOT_PROGRESS=y +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then bootflow boot; fi" +CONFIG_PRE_CONSOLE_BUFFER=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_LOG=y +CONFIG_LOGF_LINE=y +CONFIG_LOGF_FUNC=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CMD_IDE=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SATA=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_SOUND=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" +CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +# CONFIG_ACPIGEN is not set +CONFIG_SYS_IDE_MAXDEVICE=4 +CONFIG_SYS_ATA_DATA_OFFSET=0 +CONFIG_SYS_ATA_REG_OFFSET=0 +CONFIG_SYS_ATA_ALT_OFFSET=0 +CONFIG_ATAPI=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y +CONFIG_NVME_PCI=y +# CONFIG_PCI_PNP is not set +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SOUND=y +CONFIG_SOUND_I8254=y +CONFIG_VIDEO_COPY=y +CONFIG_CONSOLE_TRUETYPE=y +CONFIG_CONSOLE_SCROLL_LINES=5 +CONFIG_CMD_DHRYSTONE=y +# CONFIG_GZIP is not set +CONFIG_SMBIOS_PARSER=y diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 0a4e4b8ff85..8ac3a4feeb8 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -112,7 +112,7 @@ #define BOOTEFI_NAME "bootarm.efi" #elif defined(CONFIG_X86_RUN_32BIT) #define BOOTEFI_NAME "bootia32.efi" -#elif defined(CONFIG_X86_RUN_64BIT) +#elif defined(CONFIG_X86_64) #define BOOTEFI_NAME "bootx64.efi" #elif defined(CONFIG_ARCH_RV32I) #define BOOTEFI_NAME "bootriscv32.efi" |