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Diffstat (limited to 'arch/arm/cpu/armv7/exception_level.c')
-rw-r--r--arch/arm/cpu/armv7/exception_level.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c
index 7baade61b07..a55c158ce51 100644
--- a/arch/arm/cpu/armv7/exception_level.c
+++ b/arch/arm/cpu/armv7/exception_level.c
@@ -11,9 +11,9 @@
#include <bootm.h>
#include <cpu_func.h>
#include <log.h>
+#include <setjmp.h>
#include <asm/armv7.h>
#include <asm/secure.h>
-#include <asm/setjmp.h>
/**
* entry_non_secure() - entry point when switching to non-secure mode
@@ -24,7 +24,7 @@
*
* @non_secure_jmp: jump buffer for restoring stack and registers
*/
-static void entry_non_secure(struct jmp_buf_data *non_secure_jmp)
+static void entry_non_secure(jmp_buf non_secure_jmp)
{
dcache_enable();
debug("Reached non-secure mode\n");
@@ -42,10 +42,10 @@ static void entry_non_secure(struct jmp_buf_data *non_secure_jmp)
void switch_to_non_secure_mode(void)
{
static bool is_nonsec;
- struct jmp_buf_data non_secure_jmp;
+ jmp_buf non_secure_jmp;
if (armv7_boot_nonsec() && !is_nonsec) {
- if (setjmp(&non_secure_jmp))
+ if (setjmp(non_secure_jmp))
return;
dcache_disable(); /* flush cache before switch to HYP */
armv7_init_nonsec();