diff options
Diffstat (limited to 'arch/arm/cpu/armv8/cache_v8.c')
| -rw-r--r-- | arch/arm/cpu/armv8/cache_v8.c | 28 |
1 files changed, 24 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 3de18c7675b..e4736e56436 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -39,8 +39,28 @@ DECLARE_GLOBAL_DATA_PTR; * off: FFF */ -u64 get_tcr(int el, u64 *pips, u64 *pva_bits) +static int get_effective_el(void) { + int el = current_el(); + + if (el == 2) { + u64 hcr_el2; + + /* + * If we are using the EL2&0 translation regime, the TCR_EL2 + * looks like the EL1 version, even though we are in EL2. + */ + __asm__ ("mrs %0, HCR_EL2\n" : "=r" (hcr_el2)); + if (hcr_el2 & BIT(HCR_EL2_E2H_BIT)) + return 1; + } + + return el; +} + +u64 get_tcr(u64 *pips, u64 *pva_bits) +{ + int el = get_effective_el(); u64 max_addr = 0; u64 ips, va_bits; u64 tcr; @@ -115,7 +135,7 @@ static u64 *find_pte(u64 addr, int level) debug("addr=%llx level=%d\n", addr, level); - get_tcr(0, NULL, &va_bits); + get_tcr(NULL, &va_bits); if (va_bits < 39) start_level = 1; @@ -343,7 +363,7 @@ __weak u64 get_page_table_size(void) u64 va_bits; int start_level = 0; - get_tcr(0, NULL, &va_bits); + get_tcr(NULL, &va_bits); if (va_bits < 39) start_level = 1; @@ -415,7 +435,7 @@ __weak void mmu_setup(void) setup_all_pgtables(); el = current_el(); - set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(el, NULL, NULL), + set_ttbr_tcr_mair(el, gd->arch.tlb_addr, get_tcr(NULL, NULL), MEMORY_ATTRIBUTES); /* enable the mmu */ |