diff options
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/Kconfig')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 9656c52e955..a8b493e2f87 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -525,13 +525,6 @@ config SYS_CCI400_OFFSET Offset for CCI400 base CCI400 base addr = CCSRBAR + CCI400_OFFSET -config SYS_FSL_IFC_BANK_COUNT - int "Maximum banks of Integrated flash controller" - depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A || ARCH_LS1088A - default 4 if ARCH_LS1043A - default 4 if ARCH_LS1046A - default 8 if ARCH_LS2080A || ARCH_LS1088A - config SYS_FSL_HAS_CCI400 bool @@ -574,18 +567,9 @@ config SYS_DP_DDR_BASE_PHY DDR controller uses this value as the base address for binding. It is mapped to CONFIG_SYS_DP_DDR_BASE for core to access. -config SYS_FSL_SRDS_1 - bool - -config SYS_FSL_SRDS_2 - bool - config SYS_NXP_SRDS_3 bool -config SYS_HAS_SERDES - bool - config FSL_TZASC_1 bool |