1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-brcp1_1r_switch.dts b/arch/arm/dts/zynq-brcp1_1r_switch.dts
new file mode 100644
index 00000000000..a68d530bfe2
--- /dev/null
+++ b/arch/arm/dts/zynq-brcp1_1r_switch.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2024 B&R Industrial Automation GmbH
+ */
+
+/dts-v1/;
+#include "zynq-brcp1.dtsi"
+
+/ {
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x8000000>;
+	};
+};
+
+&gem0 {
+	status = "okay";
+	phy-mode = "gmii";
+
+	fixed-link {
+		speed = <100>;
+		full-duplex;
+	};
+};
+
+/* Since the gem0 clock is configured EMIO this dummy entry is needed */
+&clkc {
+	clocks = <&clkc 16>;
+	clock-names = "gem0_emio_clk";
+};