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Diffstat (limited to 'arch/arm/dts/zynqmp-zcu104-revC.dts')
-rw-r--r--arch/arm/dts/zynqmp-zcu104-revC.dts44
1 files changed, 37 insertions, 7 deletions
diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index e203280f0ec..8f30a2883e2 100644
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -46,6 +46,24 @@
compatible = "iio-hwmon";
io-channels = <&u183 0>, <&u183 1>, <&u183 2>, <&u183 3>;
};
+
+ clock_8t49n287_5: clk125 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ };
+
+ clock_8t49n287_2: clk26 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ };
+
+ clock_8t49n287_3: clk27 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
&can1 {
@@ -243,6 +261,13 @@
status = "okay";
};
+&psgtr {
+ status = "okay";
+ /* nc, sata, usb3, dp */
+ clocks = <&clock_8t49n287_5>, <&clock_8t49n287_2>, <&clock_8t49n287_3>;
+ clock-names = "ref1", "ref2", "ref3";
+};
+
&sata {
status = "okay";
/* SATA OOB timing settings */
@@ -255,7 +280,7 @@
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
phy-names = "sata-phy";
- phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
+ phys = <&psgtr 3 PHY_TYPE_SATA 1 1>;
};
/* SD1 with level shifter */
@@ -266,10 +291,6 @@
disable-wp;
};
-&serdes {
- status = "okay";
-};
-
&uart0 {
status = "okay";
};
@@ -287,8 +308,6 @@
status = "okay";
dr_mode = "host";
snps,usb3_lpm_capable;
- phy-names = "usb3-phy";
- phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
maximum-speed = "super-speed";
};
@@ -307,3 +326,14 @@
&ams_pl {
status = "okay";
};
+
+&zynqmp_dpdma {
+ status = "okay";
+};
+
+&zynqmp_dpsub {
+ status = "okay";
+ phy-names = "dp-phy0", "dp-phy1";
+ phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
+ <&psgtr 0 PHY_TYPE_DP 1 3>;
+};