diff options
Diffstat (limited to 'arch/arm/include/asm/arch-tegra/dc.h')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/dc.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/dc.h b/arch/arm/include/asm/arch-tegra/dc.h index 2fd07403bdf..ab12cc9c7d0 100644 --- a/arch/arm/include/asm/arch-tegra/dc.h +++ b/arch/arm/include/asm/arch-tegra/dc.h @@ -448,10 +448,19 @@ enum win_color_depth_id { #define LVS_OUTPUT_POLARITY_LOW BIT(28) #define LSC0_OUTPUT_POLARITY_LOW BIT(24) +/* DC_COM_PIN_OUTPUT_SELECT6 0x31a */ +#define LDC_OUTPUT_SELECT_V_PULSE1 BIT(14) /* 100b */ + /* DC_DISP_DISP_SIGNAL_OPTIONS0 0x400 */ #define H_PULSE0_ENABLE BIT(8) #define H_PULSE1_ENABLE BIT(10) #define H_PULSE2_ENABLE BIT(12) +#define V_PULSE0_ENABLE BIT(16) +#define V_PULSE1_ENABLE BIT(18) +#define V_PULSE2_ENABLE BIT(19) +#define V_PULSE3_ENABLE BIT(20) +#define M0_ENABLE BIT(24) +#define M1_ENABLE BIT(26) /* DC_DISP_DISP_WIN_OPTIONS 0x402 */ #define CURSOR_ENABLE BIT(16) @@ -525,6 +534,28 @@ enum { BASE_COLOR_SIZE_888, }; +/* DC_DISP_SHIFT_CLOCK_OPTIONS 0x431 */ +#define SC0_H_QUALIFIER_SHIFT 0 +#define SC1_H_QUALIFIER_SHIFT 16 +enum { + SC_H_QUALIFIER_DISABLE, + SC_H_QUALIFIER_NONE, + SC_H_QUALIFIER_HACTIVE, + SC_H_QUALIFIER_EXT_HACTIVE, + SC_H_QUALIFIER_HPULSE, + SC_H_QUALIFIER_EXT_HPULSE, +}; +#define SC0_V_QUALIFIER_SHIFT 3 +#define SC1_V_QUALIFIER_SHIFT 19 +enum { + SC_V_QUALIFIER_NONE, + SC_V_QUALIFIER_RSVD, + SC_V_QUALIFIER_VACTIVE, + SC_V_QUALIFIER_EXT_VACTIVE, + SC_V_QUALIFIER_VPULSE, + SC_V_QUALIFIER_EXT_VPULSE, +}; + /* DC_DISP_DATA_ENABLE_OPTIONS 0x432 */ #define DE_SELECT_SHIFT 0 #define DE_SELECT_MASK (0x3 << DE_SELECT_SHIFT) @@ -541,6 +572,23 @@ enum { DE_CONTROL_ACTIVE_BLANK, }; +/* DC_DISP_INIT_SEQ_CONTROL 0x442 */ +#define SEND_INIT_SEQUENCE BIT(0) +#define INIT_SEQUENCE_MODE_SPI BIT(1) +#define INIT_SEQUENCE_MODE_PLCD 0x0 +#define INIT_SEQ_DC_SIGNAL_SHIFT 4 +#define INIT_SEQ_DC_SIGNAL_MASK (0x7 << INIT_SEQ_DC_SIGNAL_SHIFT) +enum { + NO_DC_SIGNAL, + DC_SIGNAL_VSYNC, + DC_SIGNAL_VPULSE0, + DC_SIGNAL_VPULSE1, + DC_SIGNAL_VPULSE2, + DC_SIGNAL_VPULSE3, +}; +#define INIT_SEQ_DC_CONTROL_SHIFT 7 +#define FRAME_INIT_SEQ_CYCLES_SHIFT 8 + /* DC_WIN_WIN_OPTIONS 0x700 */ #define H_DIRECTION BIT(0) enum { |