diff options
Diffstat (limited to 'arch/arm/include/asm/arch-tegra2')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra2/clock.h | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra2/funcmux.h | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra2/gpio.h | 7 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra2/pinmux.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra2/tegra2.h | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra2/tegra_spi.h (renamed from arch/arm/include/asm/arch-tegra2/tegra2_spi.h) | 9 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra2/uart-spi-switch.h | 4 |
7 files changed, 22 insertions, 13 deletions
diff --git a/arch/arm/include/asm/arch-tegra2/clock.h b/arch/arm/include/asm/arch-tegra2/clock.h index 1d3ae386440..ff83bbf2938 100644 --- a/arch/arm/include/asm/arch-tegra2/clock.h +++ b/arch/arm/include/asm/arch-tegra2/clock.h @@ -186,8 +186,9 @@ enum periph_id { /* Mask value for a clock (within PERIPH_REG(id)) */ #define PERIPH_MASK(id) (1 << ((id) & 0x1f)) -/* return 1 if a PLL ID is in range */ -#define clock_id_isvalid(id) ((id) >= CLOCK_ID_FIRST && (id) < CLOCK_ID_COUNT) +/* return 1 if a PLL ID is in range, and not a simple PLL */ +#define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && \ + (id) < CLOCK_ID_FIRST_SIMPLE) /* PLL stabilization delay in usec */ #define CLOCK_PLL_STABLE_DELAY_US 300 diff --git a/arch/arm/include/asm/arch-tegra2/funcmux.h b/arch/arm/include/asm/arch-tegra2/funcmux.h index ae73c72ebe2..b16c496122a 100644 --- a/arch/arm/include/asm/arch-tegra2/funcmux.h +++ b/arch/arm/include/asm/arch-tegra2/funcmux.h @@ -30,6 +30,9 @@ enum { /* UART configs */ FUNCMUX_UART1_IRRX_IRTX = 0, + FUNCMUX_UART1_UAA_UAB, + FUNCMUX_UART1_GPU, + FUNCMUX_UART1_SDIO1, FUNCMUX_UART2_IRDA = 0, FUNCMUX_UART4_GMC = 0, @@ -41,6 +44,7 @@ enum { FUNCMUX_I2C3_DTF = 0, /* SDMMC configs */ + FUNCMUX_SDMMC1_SDIO1_4BIT = 0, FUNCMUX_SDMMC2_DTA_DTD_8BIT = 0, FUNCMUX_SDMMC3_SDB_4BIT = 0, FUNCMUX_SDMMC3_SDB_SLXA_8BIT, diff --git a/arch/arm/include/asm/arch-tegra2/gpio.h b/arch/arm/include/asm/arch-tegra2/gpio.h index 41e66fe1b15..40ddb02565a 100644 --- a/arch/arm/include/asm/arch-tegra2/gpio.h +++ b/arch/arm/include/asm/arch-tegra2/gpio.h @@ -2,6 +2,7 @@ * Copyright (c) 2011, Google Inc. All rights reserved. * See file CREDITS for list of people who contributed to this * project. + * Portions Copyright 2011-2012 NVIDIA Corporation * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -19,8 +20,8 @@ * MA 02111-1307 USA */ -#ifndef _TEGRA2_GPIO_H_ -#define _TEGRA2_GPIO_H_ +#ifndef _TEGRA_GPIO_H_ +#define _TEGRA_GPIO_H_ /* * The Tegra 2x GPIO controller has 224 GPIOs arranged in 7 banks of 4 ports, @@ -286,4 +287,4 @@ enum gpio_pin { void gpio_info(void); #define gpio_status() gpio_info() -#endif /* TEGRA2_GPIO_H_ */ +#endif /* TEGRA_GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-tegra2/pinmux.h b/arch/arm/include/asm/arch-tegra2/pinmux.h index 469d742cc30..03fa7ca643b 100644 --- a/arch/arm/include/asm/arch-tegra2/pinmux.h +++ b/arch/arm/include/asm/arch-tegra2/pinmux.h @@ -67,7 +67,7 @@ enum pmux_pingrp { PINGRP_KBCF, PINGRP_GMA, PINGRP_GMC, - PINGRP_SDMMC1, + PINGRP_SDIO1, PINGRP_OWC, /* 32: APB_MISC_PP_TRISTATE_REG_B_0 */ diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h b/arch/arm/include/asm/arch-tegra2/tegra2.h index d4ada10ea8c..3c8d8a84b55 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra2.h +++ b/arch/arm/include/asm/arch-tegra2/tegra2.h @@ -60,6 +60,10 @@ struct timerus { /* Address at which WB code runs, it must not overlap Bootrom's IRAM usage */ #define AP20_WB_RUN_ADDRESS 0x40020000 +#define NVBOOTINFOTABLE_BCTSIZE 0x38 /* BCT size in BIT in IRAM */ +#define NVBOOTINFOTABLE_BCTPTR 0x3C /* BCT pointer in BIT in IRAM */ +#define BCT_ODMDATA_OFFSET 4068 /* 12 bytes from end of BCT */ + /* These are the available SKUs (product types) for Tegra */ enum { SKU_ID_T20 = 0x8, diff --git a/arch/arm/include/asm/arch-tegra2/tegra2_spi.h b/arch/arm/include/asm/arch-tegra2/tegra_spi.h index ceec4287a3b..892d90c00ba 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra2_spi.h +++ b/arch/arm/include/asm/arch-tegra2/tegra_spi.h @@ -1,7 +1,7 @@ /* * NVIDIA Tegra2 SPI-FLASH controller * - * Copyright 2010-2011 NVIDIA Corporation + * Copyright 2010-2012 NVIDIA Corporation * * This software may be used and distributed according to the * terms of the GNU Public License, Version 2, incorporated @@ -22,8 +22,8 @@ * MA 02111-1307 USA */ -#ifndef _TEGRA2_SPI_H_ -#define _TEGRA2_SPI_H_ +#ifndef _TEGRA_SPI_H_ +#define _TEGRA_SPI_H_ #include <asm/types.h> @@ -72,5 +72,4 @@ struct spi_tegra { #define SPI_TIMEOUT 1000 #define TEGRA2_SPI_MAX_FREQ 52000000 - -#endif /* _TEGRA2_SPI_H_ */ +#endif /* _TEGRA_SPI_H_ */ diff --git a/arch/arm/include/asm/arch-tegra2/uart-spi-switch.h b/arch/arm/include/asm/arch-tegra2/uart-spi-switch.h index e4503b15b07..82ac180acd1 100644 --- a/arch/arm/include/asm/arch-tegra2/uart-spi-switch.h +++ b/arch/arm/include/asm/arch-tegra2/uart-spi-switch.h @@ -29,7 +29,7 @@ * time! If the board file provides this, the board config will declare it. * Let this be a lesson for others. */ -void pinmux_select_uart(NS16550_t regs); +void pinmux_select_uart(void); /* * Signal that we are about the use the SPI bus. @@ -38,7 +38,7 @@ void pinmux_select_spi(void); #else /* not CONFIG_SPI_UART_SWITCH */ -static inline void pinmux_select_uart(NS16550_t regs) {} +static inline void pinmux_select_uart(void) {} static inline void pinmux_select_spi(void) {} #endif |