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-rw-r--r--arch/arm/include/asm/arch-am33xx/mem.h2
-rw-r--r--arch/arm/include/asm/arch-lpc32xx/config.h19
-rw-r--r--arch/arm/include/asm/arch-omap5/mem.h2
-rw-r--r--arch/arm/include/asm/arch-tegra/ap.h7
-rw-r--r--arch/arm/include/asm/arch-tegra/crypto.h43
-rw-r--r--arch/arm/include/asm/arch-tegra/dc.h3
-rw-r--r--arch/arm/include/asm/arch-tegra/fuse.h21
-rw-r--r--arch/arm/include/asm/arch-tegra/warmboot.h7
8 files changed, 52 insertions, 52 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/mem.h b/arch/arm/include/asm/arch-am33xx/mem.h
index 0fd52f82f59..316ec09318a 100644
--- a/arch/arm/include/asm/arch-am33xx/mem.h
+++ b/arch/arm/include/asm/arch-am33xx/mem.h
@@ -29,7 +29,7 @@
*
* Currently valid part Names are (PART):
* M_NAND - Micron NAND
- * STNOR - STMicrolelctronics M29W128GL
+ * STNOR - STMicroelectronics M29W128GL
*/
#define GPMC_SIZE_256M 0x0
#define GPMC_SIZE_128M 0x8
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h
index b2d87524f70..e4005b94b54 100644
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@@ -17,25 +17,6 @@
#define CFG_SYS_BAUDRATE_TABLE \
{ 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
-/* NAND */
-#if defined(CONFIG_NAND_LPC32XX_SLC)
-#define NAND_LARGE_BLOCK_PAGE_SIZE 0x800
-#define NAND_SMALL_BLOCK_PAGE_SIZE 0x200
-
-#if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE)
-#define CFG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
- 48, 49, 50, 51, 52, 53, 54, 55, \
- 56, 57, 58, 59, 60, 61, 62, 63, }
-#elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE)
-#define CFG_SYS_NAND_ECCPOS { 10, 11, 12, 13, 14, 15, }
-#else
-#error "CONFIG_SYS_NAND_PAGE_SIZE set to an invalid value"
-#endif
-
-#define CFG_SYS_NAND_ECCSIZE 0x100
-#define CFG_SYS_NAND_ECCBYTES 3
-#endif /* CONFIG_NAND_LPC32XX_SLC */
-
/* NOR Flash */
/* USB OHCI */
diff --git a/arch/arm/include/asm/arch-omap5/mem.h b/arch/arm/include/asm/arch-omap5/mem.h
index bd72fb611d1..4f26daf1c43 100644
--- a/arch/arm/include/asm/arch-omap5/mem.h
+++ b/arch/arm/include/asm/arch-omap5/mem.h
@@ -29,7 +29,7 @@
*
* Currently valid part Names are (PART):
* M_NAND - Micron NAND
- * STNOR - STMicrolelctronics M29W128GL
+ * STNOR - STMicroelectronics M29W128GL
*/
#define GPMC_SIZE_256M 0x0
#define GPMC_SIZE_128M 0x8
diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h
index b922b2d30ea..295c3287737 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -55,6 +55,13 @@ int tegra_get_chip_sku(void);
int tegra_get_chip(void);
/**
+ * Returns the pure SOC major version from the HIDREV register
+ *
+ * Return: SOC major version
+ */
+u32 tegra_get_major_version(void);
+
+/**
* Returns the SKU ID from the sku_info register
*
* Return: SKU ID - see SKU_ID_Txx...
diff --git a/arch/arm/include/asm/arch-tegra/crypto.h b/arch/arm/include/asm/arch-tegra/crypto.h
index 7646163b97b..930bc842039 100644
--- a/arch/arm/include/asm/arch-tegra/crypto.h
+++ b/arch/arm/include/asm/arch-tegra/crypto.h
@@ -7,41 +7,36 @@
#ifndef _CRYPTO_H_
#define _CRYPTO_H_
-/**
- * Sign a block of data
- *
- * \param source Source data
- * \param length Size of source data
- * \param signature Destination address for signature, AES_KEY_LENGTH bytes
- */
-int sign_data_block(u8 *source, unsigned int length, u8 *signature);
+#define TEGRA_AES_SLOT_SBK 0
/**
- * Sign an encrypted block of data
+ * sign_data_block - Sign a block of data
*
- * \param source Source data
- * \param length Size of source data
- * \param signature Destination address for signature, AES_KEY_LENGTH bytes
- * \param key AES128 encryption key
+ * @source Source data
+ * @length Size of source data in bytes
+ * @signature Destination address for signature, AES_KEY_LENGTH bytes
+ * Return: 0 on success, negative value on failure
*/
-int sign_enc_data_block(u8 *source, unsigned int length, u8 *signature, u8 *key);
+int sign_data_block(u8 *source, unsigned int length, u8 *signature);
/**
- * Encrypt a block of data
+ * encrypt_data_block - Encrypt a block of data
*
- * \param source Source data
- * \param length Size of source data
- * \param key AES128 encryption key
+ * @source Source data
+ * @dest Destination data
+ * @length Size of source data in bytes
+ * Return: 0 on success, negative value on failure
*/
-int encrypt_data_block(u8 *source, unsigned int length, u8 *key);
+int encrypt_data_block(u8 *source, u8 *dest, unsigned int length);
/**
- * Decrypt a block of data
+ * decrypt_data_block - Decrypt a block of data
*
- * \param source Source data
- * \param length Size of source data
- * \param key AES128 encryption key
+ * @source Source data
+ * @dest Destination data
+ * @length Size of source data in bytes
+ * Return: 0 on success, negative value on failure
*/
-int decrypt_data_block(u8 *source, unsigned int length, u8 *key);
+int decrypt_data_block(u8 *source, u8 *dest, unsigned int length);
#endif /* #ifndef _CRYPTO_H_ */
diff --git a/arch/arm/include/asm/arch-tegra/dc.h b/arch/arm/include/asm/arch-tegra/dc.h
index ab12cc9c7d0..22f8f977cc6 100644
--- a/arch/arm/include/asm/arch-tegra/dc.h
+++ b/arch/arm/include/asm/arch-tegra/dc.h
@@ -448,6 +448,9 @@ enum win_color_depth_id {
#define LVS_OUTPUT_POLARITY_LOW BIT(28)
#define LSC0_OUTPUT_POLARITY_LOW BIT(24)
+/* DC_COM_PIN_OUTPUT_POLARITY3 0x309 */
+#define LSPI_OUTPUT_POLARITY_LOW BIT(8)
+
/* DC_COM_PIN_OUTPUT_SELECT6 0x31a */
#define LDC_OUTPUT_SELECT_V_PULSE1 BIT(14) /* 100b */
diff --git a/arch/arm/include/asm/arch-tegra/fuse.h b/arch/arm/include/asm/arch-tegra/fuse.h
index f3f2ad8e3f2..631ebbb283c 100644
--- a/arch/arm/include/asm/arch-tegra/fuse.h
+++ b/arch/arm/include/asm/arch-tegra/fuse.h
@@ -17,8 +17,22 @@ struct fuse_regs {
u32 fa; /* 0x148: FUSE_FA */
u32 reserved3[21]; /* 0x14C - 0x19C: */
u32 security_mode; /* 0x1A0: FUSE_SECURITY_MODE */
+ u32 sbk[4]; /* 0x1A4 - 0x1B4 */
};
+/* Defines the supported operating modes */
+enum fuse_operating_mode {
+ MODE_UNDEFINED = 0,
+ MODE_PRODUCTION = 3,
+ MODE_ODM_PRODUCTION_SECURE = 4,
+ MODE_ODM_PRODUCTION_OPEN = 5,
+};
+
+/**
+ * Initializes fuse hardware
+ */
+void tegra_fuse_init(void);
+
/**
* Calculate SoC UID
*
@@ -26,4 +40,11 @@ struct fuse_regs {
*/
unsigned long long tegra_chip_uid(void);
+/**
+ * Gives the current operating mode from fuses
+ *
+ * @return current operating mode
+ */
+enum fuse_operating_mode tegra_fuse_get_operation_mode(void);
+
#endif /* ifndef _FUSE_H_ */
diff --git a/arch/arm/include/asm/arch-tegra/warmboot.h b/arch/arm/include/asm/arch-tegra/warmboot.h
index 9a53456370f..4352f1dc5e8 100644
--- a/arch/arm/include/asm/arch-tegra/warmboot.h
+++ b/arch/arm/include/asm/arch-tegra/warmboot.h
@@ -10,12 +10,6 @@
#define STRAP_OPT_A_RAM_CODE_SHIFT 4
#define STRAP_OPT_A_RAM_CODE_MASK (0xf << STRAP_OPT_A_RAM_CODE_SHIFT)
-/* Defines the supported operating modes */
-enum fuse_operating_mode {
- MODE_PRODUCTION = 3,
- MODE_UNDEFINED,
-};
-
/* Defines the CMAC-AES-128 hash length in 32 bit words. (128 bits = 4 words) */
enum {
HASH_LENGTH = 4
@@ -125,7 +119,6 @@ union scratch3_reg {
int warmboot_save_sdram_params(void);
int warmboot_prepare_code(u32 seg_address, u32 seg_length);
-int sign_data_block(u8 *source, u32 length, u8 *signature);
void wb_start(void); /* Start of WB assembly code */
void wb_end(void); /* End of WB assembly code */
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-07 10:05:28 +0000