diff options
Diffstat (limited to 'arch/arm/include/asm')
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/clock.h | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 13 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/iomux.h | 9 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/sys_proto.h | 5 | ||||
| -rw-r--r-- | arch/arm/include/asm/imx-common/mxc_i2c.h | 33 | 
5 files changed, 63 insertions, 2 deletions
| diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index 339c789110f..c11674ff8a8 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -52,12 +52,17 @@ enum enet_freq {  u32 imx_get_uartclk(void);  u32 imx_get_fecclk(void);  unsigned int mxc_get_clock(enum mxc_clock clk); +void setup_gpmi_io_clk(u32 cfg);  void enable_ocotp_clk(unsigned char enable);  void enable_usboh3_clk(unsigned char enable); +void enable_uart_clk(unsigned char enable); +int enable_cspi_clock(unsigned char enable, unsigned spi_num); +int enable_usdhc_clk(unsigned char enable, unsigned bus_num);  int enable_sata_clock(void);  int enable_pcie_clock(void);  int enable_i2c_clk(unsigned char enable, unsigned i2c_num);  int enable_spi_clk(unsigned char enable, unsigned spi_num);  void enable_ipu_clock(void);  int enable_fec_anatop_clock(enum enet_freq freq); +void enable_enet_clk(unsigned char enable);  #endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 2631beb924f..22614fcd0ec 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -419,6 +419,19 @@ struct iomuxc {  	u32 gpr[14];  }; +struct gpc { +	u32	cntr; +	u32	pgr; +	u32	imr1; +	u32	imr2; +	u32	imr3; +	u32	imr4; +	u32	isr1; +	u32	isr2; +	u32	isr3; +	u32	isr4; +}; +  #define IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET		20  #define IOMUXC_GPR2_COUNTER_RESET_VAL_MASK		(3<<IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET)  #define IOMUXC_GPR2_LVDS_CLK_SHIFT_OFFSET		16 diff --git a/arch/arm/include/asm/arch-mx6/iomux.h b/arch/arm/include/asm/arch-mx6/iomux.h index f54db6944dd..9b3a91f0766 100644 --- a/arch/arm/include/asm/arch-mx6/iomux.h +++ b/arch/arm/include/asm/arch-mx6/iomux.h @@ -19,6 +19,12 @@  #define IOMUXC_GPR1_TEST_POWERDOWN		(1 << 18)  /* + * IOMUXC_GPR5 bit fields + */ +#define IOMUXC_GPR5_PCIE_BTNRST			(1 << 19) +#define IOMUXC_GPR5_PCIE_PERST			(1 << 18) + +/*   * IOMUXC_GPR8 bit fields   */  #define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN1_MASK		(0x3f << 0) @@ -35,12 +41,15 @@  /*   * IOMUXC_GPR12 bit fields   */ +#define IOMUXC_GPR12_RX_EQ_2			(0x2 << 0) +#define IOMUXC_GPR12_RX_EQ_MASK			(0x7 << 0)  #define IOMUXC_GPR12_LOS_LEVEL_9		(0x9 << 4)  #define IOMUXC_GPR12_LOS_LEVEL_MASK		(0x1f << 4)  #define IOMUXC_GPR12_APPS_LTSSM_ENABLE		(1 << 10)  #define IOMUXC_GPR12_DEVICE_TYPE_EP		(0x0 << 12)  #define IOMUXC_GPR12_DEVICE_TYPE_RC		(0x4 << 12)  #define IOMUXC_GPR12_DEVICE_TYPE_MASK		(0xf << 12) +#define IOMUXC_GPR12_TEST_POWERDOWN		(1 << 30)  /*   * IOMUXC_GPR13 bit fields diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 306d6998ce8..c35a905141a 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -20,8 +20,9 @@ u32 get_cpu_rev(void);  /* returns MXC_CPU_ value */  #define cpu_type(rev) (((rev) >> 12)&0xff) -/* use with MXC_CPU_ constants */ -#define is_cpu_type(cpu) (cpu_type(get_cpu_rev()) == cpu) +/* both macros return/take MXC_CPU_ constants */ +#define get_cpu_type()	(cpu_type(get_cpu_rev())) +#define is_cpu_type(cpu) (get_cpu_type() == cpu)  const char *get_imx_type(u32 imxtype);  unsigned imx_ddr_size(void); diff --git a/arch/arm/include/asm/imx-common/mxc_i2c.h b/arch/arm/include/asm/imx-common/mxc_i2c.h index 47a9edc81b3..182c2f397f1 100644 --- a/arch/arm/include/asm/imx-common/mxc_i2c.h +++ b/arch/arm/include/asm/imx-common/mxc_i2c.h @@ -19,6 +19,39 @@ struct i2c_pads_info {  	struct i2c_pin_ctrl sda;  }; +#if defined(CONFIG_MX6QDL) +#define I2C_PADS(name, scl_i2c, scl_gpio, scl_gp, sda_i2c, sda_gpio, sda_gp) \ +	struct i2c_pads_info mx6q_##name = {		\ +		.scl = {				\ +			.i2c_mode = MX6Q_##scl_i2c,	\ +			.gpio_mode = MX6Q_##scl_gpio,	\ +			.gp = scl_gp,			\ +		},					\ +		.sda = {				\ +			.i2c_mode = MX6Q_##sda_i2c,	\ +			.gpio_mode = MX6Q_##sda_gpio,	\ +			.gp = sda_gp,			\ +		}					\ +	};						\ +	struct i2c_pads_info mx6s_##name = {		\ +		.scl = {				\ +			.i2c_mode = MX6DL_##scl_i2c,	\ +			.gpio_mode = MX6DL_##scl_gpio,	\ +			.gp = scl_gp,			\ +		},					\ +		.sda = {				\ +			.i2c_mode = MX6DL_##sda_i2c,	\ +			.gpio_mode = MX6DL_##sda_gpio,	\ +			.gp = sda_gp,			\ +		}					\ +	}; + + +#define I2C_PADS_INFO(name)	\ +	(is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) ? \ +					&mx6q_##name : &mx6s_##name +#endif +  void setup_i2c(unsigned i2c_index, int speed, int slave_addr,  		struct i2c_pads_info *p);  void bus_i2c_init(void *base, int speed, int slave_addr, | 
