diff options
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-bcm235xx/boot0.h | 10 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-bcm235xx/gpio.h | 14 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-bcm235xx/sysmap.h | 30 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-imx/cpu.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-imx9/imx-regs.h | 11 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-imx9/sys_proto.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/armv8/cpu.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/io.h | 28 | ||||
-rw-r--r-- | arch/arm/include/asm/mach-imx/sys_proto.h | 1 |
9 files changed, 32 insertions, 67 deletions
diff --git a/arch/arm/include/asm/arch-bcm235xx/boot0.h b/arch/arm/include/asm/arch-bcm235xx/boot0.h deleted file mode 100644 index 8cde42b89bb..00000000000 --- a/arch/arm/include/asm/arch-bcm235xx/boot0.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2016 Broadcom Corporation. - */ - -/* BOOT0 header information */ -_start: - ARM_VECTORS - .word 0xbabeface - .word _end - _start diff --git a/arch/arm/include/asm/arch-bcm235xx/gpio.h b/arch/arm/include/asm/arch-bcm235xx/gpio.h deleted file mode 100644 index 82c12bb70c2..00000000000 --- a/arch/arm/include/asm/arch-bcm235xx/gpio.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2013 Broadcom Corporation. - */ - -#ifndef __ARCH_BCM235XX_GPIO_H -#define __ARCH_BCM235XX_GPIO_H - -/* - * Empty file - cmd_gpio.c requires this. The implementation - * is in drivers/gpio/kona_gpio.c instead of inlined here. - */ - -#endif diff --git a/arch/arm/include/asm/arch-bcm235xx/sysmap.h b/arch/arm/include/asm/arch-bcm235xx/sysmap.h deleted file mode 100644 index ff6debc677c..00000000000 --- a/arch/arm/include/asm/arch-bcm235xx/sysmap.h +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2013 Broadcom Corporation. - */ - -#ifndef __ARCH_BCM235XX_SYSMAP_H - -#define BSC1_BASE_ADDR 0x3e016000 -#define BSC2_BASE_ADDR 0x3e017000 -#define BSC3_BASE_ADDR 0x3e018000 -#define GPIO2_BASE_ADDR 0x35003000 -#define HSOTG_BASE_ADDR 0x3f120000 -#define HSOTG_CTRL_BASE_ADDR 0x3f130000 -#define KONA_MST_CLK_BASE_ADDR 0x3f001000 -#define KONA_SLV_CLK_BASE_ADDR 0x3e011000 -#define PMU_BSC_BASE_ADDR 0x3500d000 -#define SDIO1_BASE_ADDR 0x3f180000 -#define SDIO2_BASE_ADDR 0x3f190000 -#define SDIO3_BASE_ADDR 0x3f1a0000 -#define SDIO4_BASE_ADDR 0x3f1b0000 -#define TIMER_BASE_ADDR 0x3e00d000 - -#define HSOTG_DCTL_OFFSET 0x00000804 -#define HSOTG_DCTL_SFTDISCON_MASK 0x00000002 - -#define HSOTG_CTRL_PHY_P1CTL_OFFSET 0x00000008 -#define HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK 0x00000002 -#define HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK 0x00000001 - -#endif diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index 1f669c72d00..1af9778f8ce 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -78,6 +78,8 @@ #define MXC_CPU_IMX95 0x1C1 /* dummy ID */ +#define MXC_CPU_IMX94 0x1C2 /* dummy ID */ + #define MXC_SOC_MX6 0x60 #define MXC_SOC_MX7 0x70 #define MXC_SOC_IMX8M 0x80 diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h index 5127fe8f286..e641ed299c0 100644 --- a/arch/arm/include/asm/arch-imx9/imx-regs.h +++ b/arch/arm/include/asm/arch-imx9/imx-regs.h @@ -17,14 +17,23 @@ #define ANATOP_BASE_ADDR 0x44480000UL +#ifdef CONFIG_IMX94 +#define WDG3_BASE_ADDR 0x49220000UL +#define WDG4_BASE_ADDR 0x49230000UL +#else #define WDG3_BASE_ADDR 0x42490000UL #define WDG4_BASE_ADDR 0x424a0000UL +#endif #define WDG5_BASE_ADDR 0x424b0000UL #define GPIO2_BASE_ADDR 0x43810000UL #define GPIO3_BASE_ADDR 0x43820000UL #define GPIO4_BASE_ADDR 0x43840000UL #define GPIO5_BASE_ADDR 0x43850000UL +#ifdef CONFIG_IMX94 +#define GPIO6_BASE_ADDR 0x43860000UL +#define GPIO7_BASE_ADDR 0x43870000UL +#endif #define FSB_BASE_ADDR 0x47510000UL @@ -48,7 +57,7 @@ #define SRC_MIX_SLICE_FUNC_STAT_SSAR_STAT BIT(8) #define SRC_MIX_SLICE_FUNC_STAT_MEM_STAT BIT(12) -#define IMG_CONTAINER_BASE (0x80000000UL) +#define IMG_CONTAINER_BASE CFG_SYS_SDRAM_BASE #define BCTRL_GPR_ENET_QOS_INTF_MODE_MASK GENMASK(3, 1) #define BCTRL_GPR_ENET_QOS_INTF_SEL_MII (0x0 << 1) diff --git a/arch/arm/include/asm/arch-imx9/sys_proto.h b/arch/arm/include/asm/arch-imx9/sys_proto.h index 455aa95339e..dead7a99a66 100644 --- a/arch/arm/include/asm/arch-imx9/sys_proto.h +++ b/arch/arm/include/asm/arch-imx9/sys_proto.h @@ -21,6 +21,7 @@ int m33_prepare(void); int low_drive_freq_update(void *blob); enum imx9_soc_voltage_mode soc_target_voltage_mode(void); +int get_reset_reason(bool sys, bool lm); #define is_voltage_mode(mode) (soc_target_voltage_mode() == (mode)) diff --git a/arch/arm/include/asm/armv8/cpu.h b/arch/arm/include/asm/armv8/cpu.h index e906fdf1bf1..d8f0e16dadd 100644 --- a/arch/arm/include/asm/armv8/cpu.h +++ b/arch/arm/include/asm/armv8/cpu.h @@ -11,6 +11,7 @@ #define MIDR_PARTNUM_CORTEX_A73 0xD09 #define MIDR_PARTNUM_CORTEX_A75 0xD0A #define MIDR_PARTNUM_CORTEX_A76 0xD0B +#define MIDR_PARTNUM_CORTEX_A720 0xD81 #define MIDR_PARTNUM_SHIFT 0x4 #define MIDR_PARTNUM_MASK (0xFFF << MIDR_PARTNUM_SHIFT) @@ -40,3 +41,4 @@ is_cortex_a(72) is_cortex_a(73) is_cortex_a(75) is_cortex_a(76) +is_cortex_a(720) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 85ec0e6937e..cebed7397d4 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -386,12 +386,14 @@ void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count) count--; } - if (mmu_status()) { - while (count >= 8) { - *(u64 *)to = __raw_readq(from); - from += 8; - to += 8; - count -= 8; + if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) { + if (mmu_status()) { + while (count >= 8) { + *(u64 *)to = __raw_readq(from); + from += 8; + to += 8; + count -= 8; + } } } @@ -416,12 +418,14 @@ void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count) count--; } - if (mmu_status()) { - while (count >= 8) { - __raw_writeq(*(u64 *)from, to); - from += 8; - to += 8; - count -= 8; + if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) { + if (mmu_status()) { + while (count >= 8) { + __raw_writeq(*(u64 *)from, to); + from += 8; + to += 8; + count -= 8; + } } } diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 0780f99b49a..46da7a1eff5 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -97,6 +97,7 @@ struct bd_info; #define is_imx9302() (is_cpu_type(MXC_CPU_IMX9302)) #define is_imx9301() (is_cpu_type(MXC_CPU_IMX9301)) +#define is_imx94() (is_cpu_type(MXC_CPU_IMX94)) #define is_imx95() (is_cpu_type(MXC_CPU_IMX95)) #define is_imx9121() (is_cpu_type(MXC_CPU_IMX9121)) |