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path: root/arch/arm/mach-imx/imx9/scmi/clock.c
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Diffstat (limited to 'arch/arm/mach-imx/imx9/scmi/clock.c')
-rw-r--r--arch/arm/mach-imx/imx9/scmi/clock.c29
1 files changed, 15 insertions, 14 deletions
diff --git a/arch/arm/mach-imx/imx9/scmi/clock.c b/arch/arm/mach-imx/imx9/scmi/clock.c
index 6e6541eaa31..951d47bd9d7 100644
--- a/arch/arm/mach-imx/imx9/scmi/clock.c
+++ b/arch/arm/mach-imx/imx9/scmi/clock.c
@@ -6,16 +6,17 @@
#include <asm/arch/clock.h>
#include <dm/uclass.h>
#include <scmi_agent.h>
-#include "../../../../../dts/upstream/src/arm64/freescale/imx95-clock.h"
+#include <scmi_nxp_protocols.h>
+#include "common.h"
u32 get_arm_core_clk(void)
{
u32 val;
- val = imx_clk_scmi_get_rate(IMX95_CLK_SEL_A55C0);
+ val = imx_clk_scmi_get_rate(SCMI_CLK(SEL_A55C0));
if (val)
return val;
- return imx_clk_scmi_get_rate(IMX95_CLK_A55);
+ return imx_clk_scmi_get_rate(SCMI_CLK(A55));
}
void init_uart_clk(u32 index)
@@ -24,13 +25,13 @@ void init_uart_clk(u32 index)
switch (index) {
case 0:
- clock_id = IMX95_CLK_LPUART1;
+ clock_id = SCMI_CLK(LPUART1);
break;
case 1:
- clock_id = IMX95_CLK_LPUART2;
+ clock_id = SCMI_CLK(LPUART2);
break;
case 2:
- clock_id = IMX95_CLK_LPUART3;
+ clock_id = SCMI_CLK(LPUART3);
break;
default:
return;
@@ -38,7 +39,7 @@ void init_uart_clk(u32 index)
/* 24MHz */
imx_clk_scmi_enable(clock_id, false);
- imx_clk_scmi_set_parent(clock_id, IMX95_CLK_24M);
+ imx_clk_scmi_set_parent(clock_id, SCMI_CLK(24M));
imx_clk_scmi_set_rate(clock_id, 24000000);
imx_clk_scmi_enable(clock_id, true);
}
@@ -49,19 +50,19 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_ARM_CLK:
return get_arm_core_clk();
case MXC_IPG_CLK:
- return imx_clk_scmi_get_rate(IMX95_CLK_BUSWAKEUP);
+ return imx_clk_scmi_get_rate(SCMI_CLK(BUSWAKEUP));
case MXC_CSPI_CLK:
- return imx_clk_scmi_get_rate(IMX95_CLK_LPSPI1);
+ return imx_clk_scmi_get_rate(SCMI_CLK(LPSPI1));
case MXC_ESDHC_CLK:
- return imx_clk_scmi_get_rate(IMX95_CLK_USDHC1);
+ return imx_clk_scmi_get_rate(SCMI_CLK(USDHC1));
case MXC_ESDHC2_CLK:
- return imx_clk_scmi_get_rate(IMX95_CLK_USDHC2);
+ return imx_clk_scmi_get_rate(SCMI_CLK(USDHC2));
case MXC_ESDHC3_CLK:
- return imx_clk_scmi_get_rate(IMX95_CLK_USDHC3);
+ return imx_clk_scmi_get_rate(SCMI_CLK(USDHC3));
case MXC_UART_CLK:
- return imx_clk_scmi_get_rate(IMX95_CLK_LPUART1);
+ return imx_clk_scmi_get_rate(SCMI_CLK(LPUART1));
case MXC_FLEXSPI_CLK:
- return imx_clk_scmi_get_rate(IMX95_CLK_FLEXSPI1);
+ return imx_clk_scmi_get_rate(SCMI_CLK(FLEXSPI1));
default:
return -1;
};