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Diffstat (limited to 'arch/arm/mach-socfpga/mmu-arm64_s10.c')
-rw-r--r--arch/arm/mach-socfpga/mmu-arm64_s10.c59
1 files changed, 58 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/mmu-arm64_s10.c b/arch/arm/mach-socfpga/mmu-arm64_s10.c
index a55b7b7cf3b..91c6d7c55f1 100644
--- a/arch/arm/mach-socfpga/mmu-arm64_s10.c
+++ b/arch/arm/mach-socfpga/mmu-arm64_s10.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
+ * Copyright (C) 2016-2024 Intel Corporation <www.intel.com>
*
*/
@@ -10,6 +10,62 @@
DECLARE_GLOBAL_DATA_PTR;
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
+static struct mm_region socfpga_agilex5_mem_map[] = {
+ {
+ /* OCRAM 512KB */
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 0x00080000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE,
+ }, {
+ /* DEVICE */
+ .virt = 0x10808000UL,
+ .phys = 0x10808000UL,
+ .size = 0x0F7F8000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+ }, {
+ /* FPGA 1.5GB */
+ .virt = 0x20000000UL,
+ .phys = 0x20000000UL,
+ .size = 0x60000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+ }, {
+ /* FPGA 15GB */
+ .virt = 0x440000000UL,
+ .phys = 0x440000000UL,
+ .size = 0x3C0000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+ }, {
+ /* FPGA 240GB */
+ .virt = 0x4400000000UL,
+ .phys = 0x4400000000UL,
+ .size = 0x3C00000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+ }, {
+ /* MEM 2GB */
+ .virt = 0x80000000UL,
+ .phys = 0x80000000UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE,
+ }, {
+ /* List terminator */
+ },
+};
+
+struct mm_region *mem_map = socfpga_agilex5_mem_map;
+
+#else
static struct mm_region socfpga_stratix10_mem_map[] = {
{
/* MEM 2GB*/
@@ -70,3 +126,4 @@ static struct mm_region socfpga_stratix10_mem_map[] = {
};
struct mm_region *mem_map = socfpga_stratix10_mem_map;
+#endif