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-rw-r--r--arch/arm/mach-sunxi/Kconfig54
1 files changed, 47 insertions, 7 deletions
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 0a7c029b15a..6a511c4fd39 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -57,7 +57,12 @@ config DRAM_SUN50I_A133
Select this dram controller driver for some sun50i platforms,
like A133.
-if DRAM_SUN50I_H616 || DRAM_SUN50I_A133
+config DRAM_SUN55I_A523
+ bool
+ help
+ Select this DRAM controller driver for A523/T527 SoCs.
+
+if DRAM_SUN50I_H616 || DRAM_SUN50I_A133 || DRAM_SUN55I_A523
config DRAM_SUNXI_DX_ODT
hex "DRAM DX ODT parameter"
help
@@ -170,8 +175,8 @@ config DRAM_SUNXI_TPR13
config DRAM_SUNXI_TPR14
hex "DRAM TPR14 parameter"
- depends on DRAM_SUN50I_A133
- default 0x0
+ depends on DRAM_SUN50I_A133 || MACH_SUN55I_A523
+ default 0x48484848
help
TPR14 value from vendor DRAM settings.
@@ -209,6 +214,7 @@ config AXP_PMIC_BUS
config SUNXI_SRAM_ADDRESS
hex
default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
+ default 0x44000 if MACH_SUN55I_A523
default 0x20000 if SUN50I_GEN_H6 || SUNXI_GEN_NCAT2
default 0x0
---help---
@@ -221,6 +227,7 @@ config SUNXI_RVBAR_ADDRESS
hex
depends on ARM64
default 0x08100040 if MACH_SUN50I_A133
+ default 0x08000040 if MACH_SUN55I_A523
default 0x09010040 if SUN50I_GEN_H6
default 0x017000a0
---help---
@@ -249,6 +256,7 @@ config SUNXI_BL31_BASE
default 0x00044000 if MACH_SUN50I || MACH_SUN50I_H5
default 0x40000000 if MACH_SUN50I_H616
default 0x00104000 if SUN50I_GEN_H6
+ default 0x00054000 if MACH_SUN55I_A523
default 0x0
help
Address where BL31 (TF-A) is loaded, or zero if BL31 is not used.
@@ -330,7 +338,7 @@ config MACH_SUNXI_H3_H5
# TODO: try out A80's 8GiB DRAM space
config SUNXI_DRAM_MAX_SIZE
hex
- default 0x100000000 if MACH_SUN50I_H616 || MACH_SUN50I_A133
+ default 0x100000000 if MACH_SUN50I_H616 || MACH_SUN50I_A133 || MACH_SUN55I_A523
default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6
default 0x80000000
@@ -532,6 +540,16 @@ config MACH_SUN50I_A133
select SUN50I_GEN_H6
imply OF_UPSTREAM
+config MACH_SUN55I_A523
+ bool "sun55i (Allwinner A523/A527/T527/H728)"
+ select ARM64
+ select SUNXI_GEN_NCAT2
+ select SUNXI_NEW_PINCTRL
+ select DRAM_SUN55I_A523
+ select FIT
+ select SPL_LOAD_FIT if SPL
+ imply OF_UPSTREAM
+
endchoice
# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
@@ -569,7 +587,7 @@ config ARM_BOOT_HOOK_RMR
This allows both the SPL and the U-Boot proper to be entered in
either mode and switch to AArch64 if needed.
-if SUNXI_DRAM_DW || DRAM_SUN50I_H6 || DRAM_SUN50I_H616 || DRAM_SUN50I_A133
+if SUNXI_DRAM_DW || DRAM_SUN50I_H6 || DRAM_SUN50I_H616 || DRAM_SUN50I_A133 || DRAM_SUN55I_A523
config SUNXI_DRAM_DDR3
bool
@@ -587,6 +605,7 @@ config SUNXI_DRAM_DDR4
choice
prompt "DRAM Type and Timing"
+ default SUNXI_DRAM_A523_LPDDR4 if MACH_SUN55I_A523
default SUNXI_DRAM_DDR3_1333 if !MACH_SUN8I_V3S
default SUNXI_DRAM_DDR2_V3S if MACH_SUN8I_V3S
@@ -670,6 +689,21 @@ config SUNXI_DRAM_DDR2_V3S
This option is only for the DDR2 memory chip which is co-packaged in
Allwinner V3s SoC.
+config SUNXI_DRAM_A523_DDR3
+ bool "DDR3 DRAM chips on the A523/T527 DRAM controller"
+ select SUNXI_DRAM_DDR3
+ depends on DRAM_SUN55I_A523
+ help
+ This option is the DDR3 timing used by the stock boot0 by
+ Allwinner.
+
+config SUNXI_DRAM_A523_LPDDR4
+ bool "LPDDR4 DRAM chips on the A523/T527 DRAM controller"
+ select SUNXI_DRAM_LPDDR4
+ depends on DRAM_SUN55I_A523
+ help
+ This option is the LPDDR4 timing used by the stock boot0 by
+ Allwinner.
endchoice
endif
@@ -690,6 +724,7 @@ config DRAM_CLK
default 672 if MACH_SUN50I
default 744 if MACH_SUN50I_H6
default 720 if MACH_SUN50I_H616 || MACH_SUN50I_A133
+ default 1200 if MACH_SUN55I_A523
---help---
Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
must be a multiple of 24. For the sun9i (A80), the tested values
@@ -706,7 +741,9 @@ endif
config DRAM_ZQ
int "sunxi dram zq value"
- depends on !MACH_SUN50I_H616 && !MACH_SUN50I_A133
+ depends on !MACH_SUN50I_H616
+ depends on !MACH_SUN50I_A133
+ depends on !MACH_SUN55I_A523
default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || \
MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_A83T
default 127 if MACH_SUN7I
@@ -720,6 +757,7 @@ config DRAM_ZQ
config DRAM_ODT_EN
bool "sunxi dram odt enable"
depends on !MACH_SUN50I_H616
+ depends on !MACH_SUN55I_A523
default y if MACH_SUN8I_A23
default y if MACH_SUNXI_H3_H5
default y if MACH_SUN8I_R40
@@ -809,6 +847,7 @@ endif
config SYS_CLK_FREQ
default 408000000 if MACH_SUNIV
+ default 792000000 if MACH_SUN55I_A523
default 816000000 if MACH_SUN50I || MACH_SUN50I_H5
default 888000000 if MACH_SUN50I_H6
default 912000000 if MACH_SUN7I
@@ -827,6 +866,7 @@ config SYS_CONFIG_NAME
default "sun50i" if MACH_SUN50I_H6
default "sun50i" if MACH_SUN50I_H616
default "sun50i" if MACH_SUN50I_A133
+ default "sun55i" if MACH_SUN55I_A523
config SYS_BOARD
default "sunxi"
@@ -893,7 +933,7 @@ config I2C1_ENABLE
---help---
See I2C0_ENABLE help text.
-if SUNXI_GEN_SUN6I || SUN50I_GEN_H6
+if SUNXI_GEN_SUN6I || SUN50I_GEN_H6 || SUNXI_GEN_NCAT2
config R_I2C_ENABLE
bool "Enable the PRCM I2C/TWI controller"
# This is used for the pmic on H3