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-rw-r--r--arch/arm/mach-exynos/lowlevel_init.c2
-rw-r--r--arch/arm/mach-exynos/sec_boot.S2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c
index 1ff5fcac1b3..9225d2cc1f2 100644
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -51,7 +51,7 @@ enum {
#ifdef CONFIG_EXYNOS5420
/* Address for relocating helper code (Last 4 KB of IRAM) */
-#define EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000)
+#define EXYNOS_RELOCATE_CODE_BASE (CFG_IRAM_TOP - 0x1000)
/*
* Power up secondary CPUs.
diff --git a/arch/arm/mach-exynos/sec_boot.S b/arch/arm/mach-exynos/sec_boot.S
index 40c07209e47..1303544d83b 100644
--- a/arch/arm/mach-exynos/sec_boot.S
+++ b/arch/arm/mach-exynos/sec_boot.S
@@ -21,7 +21,7 @@ relocate_wait_code:
.ltorg
/*
* Secondary core waits here until Primary wake it up.
- * Below code is copied to (CONFIG_IRAM_TOP - 0x1000)
+ * Below code is copied to (CFG_IRAM_TOP - 0x1000)
* This is a workaround code which is supposed to act as a
* substitute/supplement to the iROM code.
*