diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/r8a779g0-u-boot.dtsi | 18 | ||||
| -rw-r--r-- | arch/arm/dts/r8a779g0-white-hawk-u-boot.dts | 2 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/gpio.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/soc.c | 3 |
4 files changed, 11 insertions, 15 deletions
diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi index 150657fad54..cc8becac996 100644 --- a/arch/arm/dts/r8a779g0-u-boot.dtsi +++ b/arch/arm/dts/r8a779g0-u-boot.dtsi @@ -7,20 +7,10 @@ #include "r8a779x-u-boot.dtsi" -/ { - soc { - rpc: spi@ee200000 { - compatible = "renesas,r8a779g0-rpc-if", "renesas,rcar-gen4-rpc-if"; - reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>; - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 629>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 629>; - bank-width = <2>; - num-cs = <1>; - status = "disabled"; - }; - }; +&rpc { + reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>; + bank-width = <2>; + num-cs = <1>; }; &extalr_clk { diff --git a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts index efc1b9519ef..bd756036645 100644 --- a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts +++ b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts @@ -28,7 +28,7 @@ #address-cells = <1>; #size-cells = <0>; spi-max-frequency = <40000000>; - status = "okay"; + status = "disabled"; spi-flash@0 { #address-cells = <1>; diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h index f9975d7919f..9eeeb769996 100644 --- a/arch/arm/mach-exynos/include/mach/gpio.h +++ b/arch/arm/mach-exynos/include/mach/gpio.h @@ -8,6 +8,9 @@ #define __ASM_ARCH_GPIO_H #ifndef __ASSEMBLY__ + +#include <asm/arch/cpu.h> + struct s5p_gpio_bank { unsigned int con; unsigned int dat; diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c index a07c87a2c8e..aff2b5e1b6e 100644 --- a/arch/arm/mach-exynos/soc.c +++ b/arch/arm/mach-exynos/soc.c @@ -9,6 +9,7 @@ #include <asm/cache.h> #include <asm/io.h> #include <asm/system.h> +#include <asm/arch/cpu.h> #ifdef CONFIG_TARGET_ESPRESSO7420 /* @@ -20,12 +21,14 @@ extern void _main(void); void *secondary_boot_addr = (void *)_main; #endif /* CONFIG_TARGET_ESPRESSO7420 */ +#if !CONFIG_IS_ENABLED(SYSRESET) void reset_cpu(void) { #ifdef CONFIG_CPU_V7A writel(0x1, samsung_get_base_swreset()); #endif } +#endif #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) |
