diff options
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 7 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/options.c | 4 |
2 files changed, 6 insertions, 5 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c index 15cd375ae36..2067d53ad28 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c @@ -672,7 +672,6 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr, rcw_en = 1; ap_en = popts->ap_en; } else { - rcw_en = 0; ap_en = 0; } @@ -702,9 +701,7 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr, | ((obc_cfg & 0x1) << 6) | ((ap_en & 0x1) << 5) | ((d_init & 0x1) << 4) -#ifdef CONFIG_FSL_DDR3 | ((rcw_en & 0x1) << 2) -#endif | ((md_en & 0x1) << 0) ); debug("FSLDDR: ddr_sdram_cfg_2 = 0x%08x\n", ddr->ddr_sdram_cfg_2); @@ -745,7 +742,7 @@ static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr, #ifdef CONFIG_FSL_DDR3 if (unq_mrs_en) { /* unique mode registers are supported */ - for (i = 1; i < 4; i++) { + for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { if (popts->rtt_override) rtt_wr = popts->rtt_wr_override_value; else @@ -944,7 +941,7 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr, debug("FSLDDR: ddr_sdram_mode = 0x%08x\n", ddr->ddr_sdram_mode); if (unq_mrs_en) { /* unique mode registers are supported */ - for (i = 1; i < 4; i++) { + for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { if (popts->rtt_override) rtt = popts->rtt_override_value; else diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c b/arch/powerpc/cpu/mpc8xxx/ddr/options.c index 4dc748b9510..00ec57be1ff 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c @@ -483,7 +483,9 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, unsigned int i; char buffer[HWCONFIG_BUFFER_SIZE]; char *buf = NULL; +#if defined(CONFIG_FSL_DDR3) || defined(CONFIG_FSL_DDR2) const struct dynamic_odt *pdodt = odt_unknown; +#endif ulong ddr_freq; /* @@ -493,6 +495,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0) buf = buffer; +#if defined(CONFIG_FSL_DDR3) || defined(CONFIG_FSL_DDR2) /* Chip select options. */ if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) { switch (pdimm[0].n_ranks) { @@ -546,6 +549,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, break; } } +#endif /* Pick chip-select local options. */ for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { |