diff options
Diffstat (limited to 'arch')
25 files changed, 134 insertions, 66 deletions
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 2a222c53882..b385bae0266 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -102,6 +102,9 @@ struct arch_global_data { #ifdef CONFIG_ARCH_IMX8ULP bool m33_handshake_done; #endif +#ifdef CONFIG_SMBIOS + ulong smbios_start; /* Start address of SMBIOS table */ +#endif }; #include <asm-generic/global_data.h> diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h index 9d97517e124..937fa4d1544 100644 --- a/arch/riscv/include/asm/global_data.h +++ b/arch/riscv/include/asm/global_data.h @@ -32,6 +32,9 @@ struct arch_global_data { ulong available_harts; #endif #endif +#ifdef CONFIG_SMBIOS + ulong smbios_start; /* Start address of SMBIOS table */ +#endif }; #include <asm-generic/global_data.h> diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h index f0ab3ba5c14..c6977735029 100644 --- a/arch/sandbox/include/asm/global_data.h +++ b/arch/sandbox/include/asm/global_data.h @@ -17,6 +17,7 @@ struct arch_global_data { ulong table_end; /* End address of x86 tables */ ulong table_start_high; /* Start address of high x86 tables */ ulong table_end_high; /* End address of high x86 tables */ + ulong smbios_start; /* Start address of SMBIOS table */ }; #include <asm-generic/global_data.h> diff --git a/arch/x86/cpu/apollolake/acpi.c b/arch/x86/cpu/apollolake/acpi.c index fd21c0b4968..c610a7f4477 100644 --- a/arch/x86/cpu/apollolake/acpi.c +++ b/arch/x86/cpu/apollolake/acpi.c @@ -146,16 +146,21 @@ void fill_fadt(struct acpi_fadt *fadt) fadt->x_pm_tmr_blk.addrl = IOMAP_ACPI_BASE + PM1_TMR; } -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt) +static int apl_write_fadt(struct acpi_ctx *ctx, const struct acpi_writer *entry) { - struct acpi_table_header *header = &fadt->header; + struct acpi_table_header *header; + struct acpi_fadt *fadt; - acpi_fadt_common(fadt, facs, dsdt); + fadt = ctx->current; + acpi_fadt_common(fadt, ctx->facs, ctx->dsdt); intel_acpi_fill_fadt(fadt); fill_fadt(fadt); + header = &fadt->header; header->checksum = table_compute_checksum(fadt, header->length); + + return acpi_add_fadt(ctx, fadt); } +ACPI_WRITER(5fadt, "FADT", apl_write_fadt, 0); int apl_acpi_fill_dmar(struct acpi_ctx *ctx) { diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c index 07757b88a30..4378846f8b0 100644 --- a/arch/x86/cpu/baytrail/acpi.c +++ b/arch/x86/cpu/baytrail/acpi.c @@ -15,20 +15,24 @@ #include <asm/arch/iomap.h> #include <dm/uclass-internal.h> -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt) +static int baytrail_write_fadt(struct acpi_ctx *ctx, + const struct acpi_writer *entry) { - struct acpi_table_header *header = &(fadt->header); + struct acpi_table_header *header; + struct acpi_fadt *fadt; + + fadt = ctx->current; + header = &fadt->header; u16 pmbase = ACPI_BASE_ADDRESS; - memset((void *)fadt, 0, sizeof(struct acpi_fadt)); + memset(fadt, '\0', sizeof(struct acpi_fadt)); acpi_fill_header(header, "FACP"); header->length = sizeof(struct acpi_fadt); header->revision = 4; - fadt->firmware_ctrl = (u32)facs; - fadt->dsdt = (u32)dsdt; + fadt->firmware_ctrl = (u32)ctx->facs; + fadt->dsdt = (u32)ctx->dsdt; fadt->preferred_pm_profile = ACPI_PM_MOBILE; fadt->sci_int = 9; fadt->smi_cmd = 0; @@ -75,9 +79,9 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->reset_reg.addrh = 0; fadt->reset_value = SYS_RST | RST_CPU | FULL_RST; - fadt->x_firmware_ctl_l = (u32)facs; + fadt->x_firmware_ctl_l = (u32)ctx->facs; fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32)dsdt; + fadt->x_dsdt_l = (u32)ctx->dsdt; fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; @@ -137,7 +141,10 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->x_gpe1_blk.addrh = 0x0; header->checksum = table_compute_checksum(fadt, header->length); + + return acpi_add_fadt(ctx, fadt); } +ACPI_WRITER(5fadt, "FADT", baytrail_write_fadt, 0); int acpi_create_gnvs(struct acpi_global_nvs *gnvs) { diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 560b1f7893f..cbd4a3b6797 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -11,6 +11,7 @@ #include <event.h> #include <init.h> #include <log.h> +#include <spl.h> #include <asm/cpu.h> #include <asm/cpu_x86.h> #include <asm/cpu_common.h> @@ -67,12 +68,11 @@ int arch_cpu_init(void) { post_code(POST_CPU_INIT); -#ifdef CONFIG_TPL /* Do a mini-init if TPL has already done the full init */ - return x86_cpu_reinit_f(); -#else - return x86_cpu_init_f(); -#endif + if (IS_ENABLED(CONFIG_TPL) && spl_phase() != PHASE_TPL) + return x86_cpu_reinit_f(); + else + return x86_cpu_init_f(); } int checkcpu(void) diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c index f477d513efc..d30ebee021e 100644 --- a/arch/x86/cpu/broadwell/sdram.c +++ b/arch/x86/cpu/broadwell/sdram.c @@ -5,6 +5,8 @@ * From coreboot src/soc/intel/broadwell/romstage/raminit.c */ +#define LOG_CATEGORY UCLASS_RAM + #include <common.h> #include <dm.h> #include <init.h> diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig index b97c2779041..178f8ad1816 100644 --- a/arch/x86/cpu/coreboot/Kconfig +++ b/arch/x86/cpu/coreboot/Kconfig @@ -25,6 +25,7 @@ config SYS_COREBOOT imply FS_CBFS imply CBMEM_CONSOLE imply X86_TSC_READ_BASE + imply USE_PREBOOT select BINMAN if X86_64 endif diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 835b2c77746..82fe4c71cd2 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -21,7 +21,14 @@ int arch_cpu_init(void) { - int ret = get_coreboot_info(&lib_sysinfo); + int ret; + + ret = IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() : + x86_cpu_init_f(); + if (ret) + return ret; + + ret = get_coreboot_info(&lib_sysinfo); if (ret != 0) { printf("Failed to parse coreboot tables.\n"); return ret; @@ -29,8 +36,7 @@ int arch_cpu_init(void) timestamp_init(); - return IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() : - x86_cpu_init_f(); + return 0; } int checkcpu(void) @@ -80,10 +86,6 @@ static int last_stage_init(void) if (IS_ENABLED(CONFIG_SPL_BUILD)) return 0; - /* start usb so that usb keyboard can be used as input device */ - if (IS_ENABLED(CONFIG_USB_KEYBOARD)) - usb_init(); - board_final_init(); return 0; diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index 91cd5d7c9e4..8882532ebf3 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -415,7 +415,7 @@ int cpu_phys_address_size(void) /* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */ static void setup_pci_ram_top(void) { - gd->pci_ram_top = 0x80000000U; + gd_set_pci_ram_top(0x80000000U); } static void setup_mtrr(void) diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c index 56cc253831a..ff959d1bd8d 100644 --- a/arch/x86/cpu/intel_common/mrc.c +++ b/arch/x86/cpu/intel_common/mrc.c @@ -9,6 +9,7 @@ #include <dm.h> #include <init.h> #include <log.h> +#include <spl.h> #include <syscon.h> #include <asm/cpu.h> #include <asm/global_data.h> @@ -251,13 +252,28 @@ static int sdram_initialise(struct udevice *dev, struct udevice *me_dev, int mrc_common_init(struct udevice *dev, void *pei_data, bool use_asm_linkage) { struct udevice *me_dev; - int ret; + int ret, delay; ret = syscon_get_by_driver_data(X86_SYSCON_ME, &me_dev); if (ret) return ret; + delay = dev_read_u32_default(dev, "fspm,training-delay", 0); + if (spl_phase() == PHASE_SPL) { + if (delay) + printf("SDRAM training (%d seconds)...", delay); + else + log_debug("SDRAM init..."); + } else { + if (delay) + printf("(%d seconds)...", delay); + } + ret = sdram_initialise(dev, me_dev, pei_data, use_asm_linkage); + if (delay) + printf("done\n"); + else + log_debug("done\n"); if (ret) return ret; quick_ram_check(); diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c index 82b776ff65f..9a2d682451b 100644 --- a/arch/x86/cpu/quark/acpi.c +++ b/arch/x86/cpu/quark/acpi.c @@ -10,20 +10,24 @@ #include <asm/arch/global_nvs.h> #include <asm/arch/iomap.h> -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt) +static int quark_write_fadt(struct acpi_ctx *ctx, + const struct acpi_writer *entry) { - struct acpi_table_header *header = &(fadt->header); u16 pmbase = ACPI_PM1_BASE_ADDRESS; + struct acpi_table_header *header; + struct acpi_fadt *fadt; - memset((void *)fadt, 0, sizeof(struct acpi_fadt)); + fadt = ctx->current; + header = &fadt->header; + + memset(fadt, '\0', sizeof(struct acpi_fadt)); acpi_fill_header(header, "FACP"); header->length = sizeof(struct acpi_fadt); header->revision = 4; - fadt->firmware_ctrl = (u32)facs; - fadt->dsdt = (u32)dsdt; + fadt->firmware_ctrl = (u32)ctx->facs; + fadt->dsdt = (u32)ctx->dsdt; fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED; fadt->sci_int = 9; fadt->smi_cmd = 0; @@ -70,9 +74,9 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->reset_reg.addrh = 0; fadt->reset_value = SYS_RST | RST_CPU | FULL_RST; - fadt->x_firmware_ctl_l = (u32)facs; + fadt->x_firmware_ctl_l = (u32)ctx->facs; fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32)dsdt; + fadt->x_dsdt_l = (u32)ctx->dsdt; fadt->x_dsdt_h = 0; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; @@ -132,7 +136,10 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->x_gpe1_blk.addrh = 0x0; header->checksum = table_compute_checksum(fadt, header->length); + + return acpi_add_fadt(ctx, fadt); } +ACPI_WRITER(5fadt, "FADT", quark_write_fadt, 0); int acpi_create_gnvs(struct acpi_global_nvs *gnvs) { diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c index 3ffba3897aa..1c667c7d569 100644 --- a/arch/x86/cpu/tangier/acpi.c +++ b/arch/x86/cpu/tangier/acpi.c @@ -16,19 +16,23 @@ #include <asm/arch/iomap.h> #include <dm/uclass-internal.h> -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt) +static int tangier_write_fadt(struct acpi_ctx *ctx, + const struct acpi_writer *entry) { - struct acpi_table_header *header = &(fadt->header); + struct acpi_table_header *header; + struct acpi_fadt *fadt; - memset((void *)fadt, 0, sizeof(struct acpi_fadt)); + fadt = ctx->current; + header = &fadt->header; + + memset(fadt, '\0', sizeof(struct acpi_fadt)); acpi_fill_header(header, "FACP"); header->length = sizeof(struct acpi_fadt); header->revision = 6; - fadt->firmware_ctrl = (u32)facs; - fadt->dsdt = (u32)dsdt; + fadt->firmware_ctrl = (u32)ctx->facs; + fadt->dsdt = (u32)ctx->dsdt; fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED; fadt->iapc_boot_arch = ACPI_FADT_VGA_NOT_PRESENT | @@ -41,13 +45,16 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, fadt->minor_revision = 2; - fadt->x_firmware_ctl_l = (u32)facs; + fadt->x_firmware_ctl_l = (u32)ctx->facs; fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32)dsdt; + fadt->x_dsdt_l = (u32)ctx->dsdt; fadt->x_dsdt_h = 0; header->checksum = table_compute_checksum(fadt, header->length); + + return acpi_add_fadt(ctx, fadt); } +ACPI_WRITER(5fadt, "FADT", tangier_write_fadt, 0); u32 acpi_fill_madt(u32 current) { diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index d1c3873dd6a..2647bff891f 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -8,8 +8,11 @@ #include <cpu_func.h> #include <debug_uart.h> #include <init.h> +#include <asm/cpu.h> #include <asm/global_data.h> +DECLARE_GLOBAL_DATA_PTR; + int cpu_has_64bit(void) { return true; @@ -38,6 +41,10 @@ int x86_mp_init(void) int x86_cpu_reinit_f(void) { + /* set the vendor to Intel so that native_calibrate_tsc() works */ + gd->arch.x86_vendor = X86_VENDOR_INTEL; + gd->arch.has_mtrr = true; + return 0; } diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index 96705ceed07..ddff277046a 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -266,6 +266,7 @@ board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>, <&gpio_c 3 0>, <&gpio_c 1 0>; bootph-all; + fspm,training-delay = <7>; spd { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index f9ff5346a79..0eb31cae42c 100644 --- a/arch/x86/dts/coreboot.dts +++ b/arch/x86/dts/coreboot.dts @@ -42,6 +42,7 @@ }; coreboot-fb { + bootph-some-ram; compatible = "coreboot-fb"; }; }; diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h index 72e1873d15d..226753b65d6 100644 --- a/arch/x86/include/asm/acpi_table.h +++ b/arch/x86/include/asm/acpi_table.h @@ -24,8 +24,6 @@ struct acpi_table_header; /* These can be used by the target port */ -void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, - void *dsdt); int acpi_create_madt_lapics(u32 current); int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr, u32 gsi_base); diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h index 4de137fbab9..0dfb64babb9 100644 --- a/arch/x86/include/asm/coreboot_tables.h +++ b/arch/x86/include/asm/coreboot_tables.h @@ -299,11 +299,24 @@ struct cb_vdat { #define CB_TAG_TIMESTAMPS 0x0016 #define CB_TAG_CBMEM_CONSOLE 0x0017 +#define CBMC_CURSOR_MASK ((1 << 28) - 1) +#define CBMC_OVERFLOW BIT(31) + +/* + * struct cbmem_console - In-memory console buffer for coreboot + * + * Structure describing console buffer. It is overlaid on a flat memory area, + * with body covering the extent of the memory. Once the buffer is full, + * output will wrap back around to the start of the buffer. The high bit of the + * cursor field gets set to indicate that this happened. If the underlying + * storage allows this, the buffer will persist across multiple boots and append + * to the previous log. + */ struct cbmem_console { u32 size; u32 cursor; - char body[0]; -} __packed; + u8 body[0]; +}; #define CB_TAG_MRC_CACHE 0x0018 diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index ea58259ad77..6f4a7130f1d 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -127,6 +127,7 @@ struct arch_global_data { ulong table_end; /* End address of x86 tables */ ulong table_start_high; /* Start address of high x86 tables */ ulong table_end_high; /* End address of high x86 tables */ + ulong smbios_start; /* Start address of SMBIOS table */ }; #endif diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index e3b7e9a4bbe..c5b33dc65de 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -458,21 +458,6 @@ int acpi_write_gnvs(struct acpi_ctx *ctx, const struct acpi_writer *entry) } ACPI_WRITER(4gnvs, "GNVS", acpi_write_gnvs, 0); -static int acpi_write_fadt(struct acpi_ctx *ctx, - const struct acpi_writer *entry) -{ - struct acpi_fadt *fadt; - - fadt = ctx->current; - acpi_create_fadt(fadt, ctx->facs, ctx->dsdt); - acpi_add_table(ctx, fadt); - - acpi_inc(ctx, sizeof(struct acpi_fadt)); - - return 0; -} -ACPI_WRITER(5fact, "FADT", acpi_write_fadt, 0); - /** * acpi_write_hpet() - Write out a HPET table * diff --git a/arch/x86/lib/coreboot/cb_sysinfo.c b/arch/x86/lib/coreboot/cb_sysinfo.c index dfbc80c430e..f7fd9ea5bcb 100644 --- a/arch/x86/lib/coreboot/cb_sysinfo.c +++ b/arch/x86/lib/coreboot/cb_sysinfo.c @@ -471,6 +471,7 @@ int get_coreboot_info(struct sysinfo_t *info) return -ENOENT; gd->arch.coreboot_table = addr; gd_set_acpi_start(map_to_sysmem(info->rsdp)); + gd_set_smbios_start(info->smbios_start); gd->flags |= GD_FLG_SKIP_LL_INIT; return 0; diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 60a2707dcf1..bf0c921577d 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -15,7 +15,8 @@ DECLARE_GLOBAL_DATA_PTR; int init_cache_f_r(void) { bool do_mtrr = CONFIG_IS_ENABLED(X86_32BIT_INIT) || - IS_ENABLED(CONFIG_FSP_VERSION2); + IS_ENABLED(CONFIG_FSP_VERSION2) || + (IS_ENABLED(CONFIG_TPL) && IS_ENABLED(CONFIG_HAVE_MRC)); int ret; /* @@ -23,11 +24,9 @@ int init_cache_f_r(void) * * booting from slimbootloader - MTRRs are already set up * booting with FSPv1 - MTRRs are already set up - * booting with FSPv2 - MTRRs must be set here + * booting with FSPv2 or MRC - MTRRs must be set here * booting from coreboot - in this case there is no SPL, so we set up * the MTRRs here - * Note: if there is an SPL, then it has already set up MTRRs so we - * don't need to do that here */ do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) && !IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER); diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 58fa572b71a..c15f11f8cdf 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -230,6 +230,9 @@ void board_init_f_r(void) mtrr_commit(false); init_cache(); gd->flags &= ~GD_FLG_SERIAL_READY; + + /* make sure driver model is not accessed from now on */ + gd->flags |= GD_FLG_DM_DEAD; debug("cache status %d\n", dcache_status()); board_init_r(gd, 0); } @@ -258,7 +261,7 @@ static int spl_board_load_image(struct spl_image_info *spl_image, spl_image->os = IH_OS_U_BOOT; spl_image->name = "U-Boot"; - if (!IS_ENABLED(CONFIG_SYS_COREBOOT)) { + if (spl_image->load_addr != spl_get_image_pos()) { /* Copy U-Boot from ROM */ memcpy((void *)spl_image->load_addr, (void *)spl_get_image_pos(), spl_get_image_size()); diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 67bc0a72aeb..5b5070f7ca5 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -97,6 +97,9 @@ int write_tables(void) int size = table->size ? : CONFIG_ROM_TABLE_SIZE; u32 rom_table_end; + if (!strcmp("smbios", table->name)) + gd->arch.smbios_start = rom_addr; + if (IS_ENABLED(CONFIG_BLOBLIST_TABLES) && table->tag) { if (!gd->arch.table_end) gd->arch.table_end = rom_addr; diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 18b05b2f672..273e9c8e1ca 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -3,6 +3,8 @@ * Copyright (c) 2018 Google, Inc */ +#define LOG_CATEGORY LOGC_BOOT + #include <common.h> #include <debug_uart.h> #include <dm.h> |