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-rw-r--r--arch/arm/dts/k3-am625-sk-u-boot.dtsi22
-rw-r--r--arch/arm/include/asm/arch-npcm8xx/rst.h2
-rw-r--r--arch/arm/mach-k3/Kconfig4
-rw-r--r--arch/arm/mach-k3/am625_init.c19
-rw-r--r--arch/arm/mach-k3/am62a7_init.c16
-rw-r--r--arch/arm/mach-k3/include/mach/am62a_hardware.h17
-rw-r--r--arch/arm/mach-omap2/omap3/Kconfig2
-rw-r--r--arch/arm/mach-snapdragon/init_sdm845.c18
8 files changed, 84 insertions, 16 deletions
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 92788bae3e0..f275e3b46ca 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -126,3 +126,25 @@
};
};
};
+
+&cpsw3g {
+ reg = <0x0 0x8000000 0x0 0x200000>,
+ <0x0 0x43000200 0x0 0x8>;
+ reg-names = "cpsw_nuss", "mac_efuse";
+ /delete-property/ ranges;
+ u-boot,dm-spl;
+
+ cpsw-phy-sel@04044 {
+ compatible = "ti,am64-phy-gmii-sel";
+ reg = <0x0 0x00104044 0x0 0x8>;
+ u-boot,dm-spl;
+ };
+};
+
+&cpsw_port1 {
+ u-boot,dm-spl;
+};
+
+&cpsw_port2 {
+ status = "disabled";
+};
diff --git a/arch/arm/include/asm/arch-npcm8xx/rst.h b/arch/arm/include/asm/arch-npcm8xx/rst.h
index 379e841fcae..09e14850639 100644
--- a/arch/arm/include/asm/arch-npcm8xx/rst.h
+++ b/arch/arm/include/asm/arch-npcm8xx/rst.h
@@ -16,7 +16,7 @@
#define SW1RST BIT(28)
#define SW2RST BIT(27)
#define SW3RST BIT(26)
-#define SW4RST BIT(25)
+#define TIPRST BIT(25)
#define WD1RST BIT(24)
#define WD2RST BIT(23)
#define RST_STS_MASK GENMASK(31, 23)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 87da6b49ee6..a8c3a593d57 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -69,7 +69,9 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
default 0x41cffbfc if SOC_K3_J721E
default 0x41cfdbfc if SOC_K3_J721S2
default 0x701bebfc if SOC_K3_AM642
- default 0x43c3f290 if SOC_K3_AM625 || SOC_K3_AM62A7
+ default 0x43c3f290 if SOC_K3_AM625
+ default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
+ default 0x7000f290 if SOC_K3_AM62A7 && ARM64
help
Address at which ROM stores the value which determines if SPL
is booted up by primary boot media or secondary boot media.
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index da2229d0bff..a91c15ca4e1 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -173,21 +173,20 @@ void board_init_f(ulong dummy)
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
{
u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
+ u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
+ MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
- switch (boot_device) {
- case BOOT_DEVICE_MMC1:
- if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK) >>
- MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_SHIFT)
- return MMCSD_MODE_EMMCBOOT;
- return MMCSD_MODE_FS;
-
- case BOOT_DEVICE_MMC2:
- return MMCSD_MODE_FS;
+ switch (bootmode) {
+ case BOOT_DEVICE_EMMC:
+ return MMCSD_MODE_EMMCBOOT;
+ case BOOT_DEVICE_MMC:
+ if (bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK)
+ return MMCSD_MODE_RAW;
default:
- return MMCSD_MODE_RAW;
+ return MMCSD_MODE_FS;
}
}
diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c
index e9569f0d264..02da24a3d6f 100644
--- a/arch/arm/mach-k3/am62a7_init.c
+++ b/arch/arm/mach-k3/am62a7_init.c
@@ -25,8 +25,11 @@ static struct rom_extended_boot_data bootdata __section(".data");
static void store_boot_info_from_rom(void)
{
bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
- memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
- sizeof(struct rom_extended_boot_data));
+
+ if (IS_ENABLED(CONFIG_CPU_V7R)) {
+ memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
+ sizeof(struct rom_extended_boot_data));
+ }
}
static void ctrl_mmr_unlock(void)
@@ -123,6 +126,15 @@ void board_init_f(ulong dummy)
k3_sysfw_loader(true, NULL, NULL);
#endif
+#if defined(CONFIG_CPU_V7R)
+ /*
+ * Relocate boot information to OCRAM (after TIFS has opend this
+ * region for us) so the next bootloader stages can keep access to
+ * primary vs backup bootmodes.
+ */
+ writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
+#endif
+
/*
* Force probe of clk_k3 driver here to ensure basic default clock
* configuration is always done.
diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h
index 52b0d9b3cb9..13bf50f147b 100644
--- a/arch/arm/mach-k3/include/mach/am62a_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h
@@ -68,7 +68,22 @@
#define ROM_ENTENDED_BOOT_DATA_INFO 0x43c3f1e0
-/* Use Last 2K as Scratch pad */
+#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290
+
+/*
+ * During the boot process ROM will kill anything that writes to OCSRAM.
+ * This means the wakeup SPL cannot use this region during boot. To
+ * complicate things, TIFS will set a firewall between HSM RAM and the
+ * main domain.
+ *
+ * So, during the wakeup SPL, we will need to store the EEPROM data
+ * somewhere in HSM RAM, and the main domain's SPL will need to store it
+ * somewhere in OCSRAM
+ */
+#ifdef CONFIG_CPU_V7R
+#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000
+#else
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x70000001
+#endif /* CONFIG_CPU_V7R */
#endif /* __ASM_ARCH_AM62A_HARDWARE_H */
diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig
index 3e97ec26295..671e4791c67 100644
--- a/arch/arm/mach-omap2/omap3/Kconfig
+++ b/arch/arm/mach-omap2/omap3/Kconfig
@@ -163,7 +163,7 @@ config SYS_SOC
source "board/logicpd/am3517evm/Kconfig"
source "board/ti/beagle/Kconfig"
source "board/timll/devkit8000/Kconfig"
-source "board/ti/evm/Kconfig"
+source "board/ti/omap3evm/Kconfig"
source "board/isee/igep00x0/Kconfig"
source "board/logicpd/omap3som/Kconfig"
source "board/nokia/rx51/Kconfig"
diff --git a/arch/arm/mach-snapdragon/init_sdm845.c b/arch/arm/mach-snapdragon/init_sdm845.c
index 5f53c219471..1f885023943 100644
--- a/arch/arm/mach-snapdragon/init_sdm845.c
+++ b/arch/arm/mach-snapdragon/init_sdm845.c
@@ -78,5 +78,23 @@ __weak int misc_init_r(void)
env_set("key_power", "0");
}
+ /*
+ * search for kaslr address, set by primary bootloader by searching first
+ * 0x100 relocated bytes at u-boot's initial load address range
+ */
+ uintptr_t start = gd->ram_base;
+ uintptr_t end = start + 0x800000;
+ u8 *addr = (u8 *)start;
+ phys_addr_t *relocaddr = (phys_addr_t *)gd->relocaddr;
+ u32 block_size = 0x1000;
+
+ while (memcmp(addr, relocaddr, 0x100) && (uintptr_t)addr < end)
+ addr += block_size;
+
+ if ((uintptr_t)addr >= end)
+ printf("KASLR not found in range 0x%lx - 0x%lx", start, end);
+ else
+ env_set_addr("KASLR", addr);
+
return 0;
}