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-rw-r--r--common/spl/Kconfig.vpl13
-rw-r--r--common/spl/spl.c26
-rw-r--r--common/spl/spl_fit.c40
-rw-r--r--common/spl/spl_reloc.c2
4 files changed, 63 insertions, 18 deletions
diff --git a/common/spl/Kconfig.vpl b/common/spl/Kconfig.vpl
index 97dfc630152..cf6b36c8e38 100644
--- a/common/spl/Kconfig.vpl
+++ b/common/spl/Kconfig.vpl
@@ -9,6 +9,19 @@ config VPL_BANNER_PRINT
info. Disabling this option could be useful to reduce VPL boot time
(e.g. approx. 6 ms faster, when output on i.MX6 with 115200 baud).
+config VPL_LDSCRIPT
+ string "Linker script for the VPL stage"
+ default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
+ default "arch/\$(ARCH)/cpu/u-boot-spl.lds"
+ help
+ The TPL stage will usually require a different linker-script
+ (as it runs from a different memory region) than the regular
+ U-Boot stage. Set this to the path of the linker-script to
+ be used for TPL.
+
+ May be left empty to trigger the Makefile infrastructure to
+ fall back to the linker-script used for the SPL stage.
+
config VPL_BOARD_INIT
bool "Call board-specific initialization in VPL"
help
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 9af0a4954d4..76fd56dfe4b 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -50,8 +50,10 @@ u32 *boot_params_ptr = NULL;
#if CONFIG_IS_ENABLED(BINMAN_UBOOT_SYMBOLS)
/* See spl.h for information about this */
+#if defined(CONFIG_SPL_BUILD)
binman_sym_declare(ulong, u_boot_any, image_pos);
binman_sym_declare(ulong, u_boot_any, size);
+#endif
#ifdef CONFIG_TPL
binman_sym_declare(ulong, u_boot_spl_any, image_pos);
@@ -179,9 +181,15 @@ ulong spl_get_image_pos(void)
if (xpl_next_phase() == PHASE_VPL)
return binman_sym(ulong, u_boot_vpl_any, image_pos);
#endif
- return xpl_next_phase() == PHASE_SPL ?
- binman_sym(ulong, u_boot_spl_any, image_pos) :
- binman_sym(ulong, u_boot_any, image_pos);
+#if defined(CONFIG_TPL) && !defined(CONFIG_VPL)
+ if (xpl_next_phase() == PHASE_SPL)
+ return binman_sym(ulong, u_boot_spl_any, image_pos);
+#endif
+#if defined(CONFIG_SPL_BUILD)
+ return binman_sym(ulong, u_boot_any, image_pos);
+#endif
+
+ return BINMAN_SYM_MISSING;
}
ulong spl_get_image_size(void)
@@ -263,14 +271,20 @@ void spl_set_header_raw_uboot(struct spl_image_info *spl_image)
*/
if (u_boot_pos && u_boot_pos != BINMAN_SYM_MISSING) {
/* Binman does not support separated entry addresses */
- spl_image->entry_point = u_boot_pos;
- spl_image->load_addr = u_boot_pos;
+ spl_image->entry_point = spl_get_image_text_base();
+ spl_image->load_addr = spl_get_image_text_base();
+ spl_image->size = spl_get_image_size();
+ log_debug("Next load addr %lx\n", spl_image->load_addr);
} else {
spl_image->entry_point = CONFIG_SYS_UBOOT_START;
spl_image->load_addr = CONFIG_TEXT_BASE;
+ log_debug("Default load addr %x (u_boot_pos=%lx)\n",
+ CONFIG_TEXT_BASE, u_boot_pos);
}
spl_image->os = IH_OS_U_BOOT;
- spl_image->name = "U-Boot";
+ spl_image->name = xpl_name(xpl_next_phase());
+ log_debug("Next phase: %s at %lx size %lx\n", spl_image->name,
+ spl_image->load_addr, (ulong)spl_image->size);
}
__weak int spl_parse_board_header(struct spl_image_info *spl_image,
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 64c4349b138..49b4df60560 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -199,7 +199,9 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size,
* the image gets loaded to the address pointed to by the
* load_addr member in this struct, if load_addr is not 0
*
- * Return: 0 on success or a negative error number.
+ * Return: 0 on success, -EPERM if this image is not the correct phase
+ * (for CONFIG_BOOTMETH_VBE_SIMPLE_FW), or another negative error number on
+ * other error.
*/
static int load_simple_fit(struct spl_load_info *info, ulong fit_offset,
const struct spl_fit_info *ctx, int node,
@@ -218,6 +220,25 @@ static int load_simple_fit(struct spl_load_info *info, ulong fit_offset,
const void *fit = ctx->fit;
bool external_data = false;
+ log_debug("starting\n");
+ if (CONFIG_IS_ENABLED(BOOTMETH_VBE) &&
+ xpl_get_phase(info) != IH_PHASE_NONE) {
+ enum image_phase_t phase;
+ int ret;
+
+ ret = fit_image_get_phase(fit, node, &phase);
+ /* if the image is for any phase, let's use it */
+ if (ret == -ENOENT || phase == xpl_get_phase(info)) {
+ log_debug("found\n");
+ } else if (ret < 0) {
+ log_debug("err=%d\n", ret);
+ return ret;
+ } else {
+ log_debug("- phase mismatch, skipping this image\n");
+ return -EPERM;
+ }
+ }
+
if (IS_ENABLED(CONFIG_SPL_FPGA) ||
(IS_ENABLED(CONFIG_SPL_OS_BOOT) && spl_decompression_enabled())) {
if (fit_image_get_type(fit, node, &type))
@@ -278,10 +299,7 @@ static int load_simple_fit(struct spl_load_info *info, ulong fit_offset,
log_debug("reading from offset %x / %lx size %lx to %p: ",
offset, read_offset, size, src_ptr);
- if (info->read(info,
- fit_offset +
- get_aligned_image_offset(info, offset), size,
- src_ptr) < length)
+ if (info->read(info, read_offset, size, src_ptr) < length)
return -EIO;
debug("External data: dst=%p, offset=%x, size=%lx\n",
@@ -456,7 +474,9 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
image_info.load_addr = (ulong)tmpbuffer;
ret = load_simple_fit(info, offset, ctx, node,
&image_info);
- if (ret < 0)
+ if (ret == -EPERM)
+ continue;
+ else if (ret < 0)
break;
/* Make room in FDT for changes from the overlay */
@@ -495,9 +515,6 @@ static int spl_fit_record_loadable(const struct spl_fit_info *ctx, int index,
const char *name;
int node;
- if (CONFIG_IS_ENABLED(FIT_IMAGE_TINY))
- return 0;
-
ret = spl_fit_get_image_name(ctx, "loadables", index, &name);
if (ret < 0)
return ret;
@@ -817,7 +834,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
image_info.load_addr = 0;
ret = load_simple_fit(info, offset, &ctx, node, &image_info);
- if (ret < 0) {
+ if (ret < 0 && ret != -EPERM) {
printf("%s: can't load image loadables index %d (ret = %d)\n",
__func__, index, ret);
return ret;
@@ -843,7 +860,8 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
spl_image->entry_point = image_info.entry_point;
/* Record our loadables into the FDT */
- if (spl_image->fdt_addr)
+ if (!CONFIG_IS_ENABLED(FIT_IMAGE_TINY) &&
+ xpl_get_fdt_update(info) && spl_image->fdt_addr)
spl_fit_record_loadable(&ctx, index,
spl_image->fdt_addr,
&image_info);
diff --git a/common/spl/spl_reloc.c b/common/spl/spl_reloc.c
index be8349b535b..324b98eaf98 100644
--- a/common/spl/spl_reloc.c
+++ b/common/spl/spl_reloc.c
@@ -154,7 +154,7 @@ int spl_reloc_jump(struct spl_image_info *image, spl_jump_to_image_t jump)
rcode_func loader;
int ret;
- log_debug("malloc usage %lx bytes (%ld KB of %d KB)\n", gd->malloc_ptr,
+ log_debug("malloc usage %x bytes (%d KB of %d KB)\n", gd->malloc_ptr,
gd->malloc_ptr / 1024, CONFIG_VAL(SYS_MALLOC_F_LEN) / 1024);
if (*image->stack_prot != STACK_PROT_VALUE) {
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-17 18:31:06 +0000