diff options
Diffstat (limited to 'drivers/clk/at91/clk-sam9x60-pll.c')
| -rw-r--r-- | drivers/clk/at91/clk-sam9x60-pll.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c index a30035eb8ce..676ad8294a6 100644 --- a/drivers/clk/at91/clk-sam9x60-pll.c +++ b/drivers/clk/at91/clk-sam9x60-pll.c @@ -31,9 +31,6 @@ #define UPLL_DIV 2 #define PLL_MUL_MAX (FIELD_GET(PMC_PLL_CTRL1_MUL_MSK, UINT_MAX) + 1) -#define FCORE_MIN (600000000) -#define FCORE_MAX (1200000000) - #define PLL_MAX_ID 7 struct sam9x60_pll { @@ -55,14 +52,15 @@ static inline bool sam9x60_pll_ready(void __iomem *base, int id) return !!(status & BIT(id)); } -static long sam9x60_frac_pll_compute_mul_frac(u32 *mul, u32 *frac, ulong rate, +static long sam9x60_frac_pll_compute_mul_frac(const struct clk_range *core_clk, + u32 *mul, u32 *frac, ulong rate, ulong parent_rate) { unsigned long tmprate, remainder; unsigned long nmul = 0; unsigned long nfrac = 0; - if (rate < FCORE_MIN || rate > FCORE_MAX) + if (rate < core_clk->min || rate > core_clk->max) return -ERANGE; /* @@ -82,7 +80,7 @@ static long sam9x60_frac_pll_compute_mul_frac(u32 *mul, u32 *frac, ulong rate, } /* Check if resulted rate is valid. */ - if (tmprate < FCORE_MIN || tmprate > FCORE_MAX) + if (tmprate < core_clk[0].min || tmprate > core_clk[0].max) return -ERANGE; *mul = nmul - 1; @@ -103,8 +101,8 @@ static ulong sam9x60_frac_pll_set_rate(struct clk *clk, ulong rate) if (!parent_rate) return 0; - ret = sam9x60_frac_pll_compute_mul_frac(&nmul, &nfrac, rate, - parent_rate); + ret = sam9x60_frac_pll_compute_mul_frac(pll->characteristics->core_output, + &nmul, &nfrac, rate, parent_rate); if (ret < 0) return 0; @@ -163,7 +161,8 @@ static int sam9x60_frac_pll_enable(struct clk *clk) ulong crate; crate = sam9x60_frac_pll_get_rate(clk); - if (crate < FCORE_MIN || crate > FCORE_MAX) + if (crate < pll->characteristics->core_output[0].min || + crate > pll->characteristics->core_output[0].max) return -ERANGE; pmc_update_bits(base, AT91_PMC_PLL_UPDT, AT91_PMC_PLL_UPDT_ID_MSK, |