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path: root/drivers/ddr/marvell/a38x/ddr3_init.h
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Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_init.h')
-rw-r--r--drivers/ddr/marvell/a38x/ddr3_init.h42
1 files changed, 35 insertions, 7 deletions
diff --git a/drivers/ddr/marvell/a38x/ddr3_init.h b/drivers/ddr/marvell/a38x/ddr3_init.h
index 9288073a780..b513a13c534 100644
--- a/drivers/ddr/marvell/a38x/ddr3_init.h
+++ b/drivers/ddr/marvell/a38x/ddr3_init.h
@@ -45,15 +45,46 @@ enum log_level {
#define MISL_PHY_ODT_N_OFFS 0x0
/* Globals */
-extern u8 debug_training, debug_calibration, debug_ddr4_centralization,
- debug_tap_tuning, debug_dm_tuning;
+#if defined(CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS)
+static const u8 is_reg_dump = 0;
+static const u8 debug_training_static = DEBUG_LEVEL_ERROR;
+static const u8 debug_training = DEBUG_LEVEL_ERROR;
+static const u8 debug_leveling = DEBUG_LEVEL_ERROR;
+static const u8 debug_centralization = DEBUG_LEVEL_ERROR;
+static const u8 debug_training_ip = DEBUG_LEVEL_ERROR;
+static const u8 debug_training_bist = DEBUG_LEVEL_ERROR;
+static const u8 debug_training_hw_alg = DEBUG_LEVEL_ERROR;
+static const u8 debug_training_access = DEBUG_LEVEL_ERROR;
+static const u8 debug_training_device = DEBUG_LEVEL_ERROR;
+static const u8 debug_pbs = DEBUG_LEVEL_ERROR;
+
+static const u8 debug_tap_tuning = DEBUG_LEVEL_ERROR;
+static const u8 debug_calibration = DEBUG_LEVEL_ERROR;
+static const u8 debug_ddr4_centralization = DEBUG_LEVEL_ERROR;
+static const u8 debug_dm_tuning = DEBUG_LEVEL_ERROR;
+#else /* !CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS */
extern u8 is_reg_dump;
+extern u8 debug_training_static;
+extern u8 debug_training;
+extern u8 debug_leveling;
+extern u8 debug_centralization;
+extern u8 debug_training_ip;
+extern u8 debug_training_bist;
+extern u8 debug_training_hw_alg;
+extern u8 debug_training_access;
+extern u8 debug_training_device;
+extern u8 debug_pbs;
+
+extern u8 debug_tap_tuning;
+extern u8 debug_calibration;
+extern u8 debug_ddr4_centralization;
+extern u8 debug_dm_tuning;
+#endif /* !CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS */
+
extern u8 generic_init_controller;
/* list of allowed frequency listed in order of enum mv_ddr_freq */
extern u32 is_pll_old;
extern struct pattern_info pattern_table[];
-extern u8 debug_centralization, debug_training_ip, debug_training_bist,
- debug_pbs, debug_training_static, debug_leveling;
extern struct hws_tip_config_func_db config_func_info[];
extern u8 twr_mask_table[];
extern u8 cl_mask_table[];
@@ -76,7 +107,6 @@ extern u32 g_rtt_nom;
extern u32 g_rtt_wr;
extern u32 g_rtt_park;
-extern u8 debug_training_access;
extern u32 first_active_if;
extern u32 delay_enable, ck_delay, ca_delay;
extern u32 mask_tune_func;
@@ -122,8 +152,6 @@ extern u32 effective_cs;
extern int ddr3_tip_centr_skip_min_win_check;
extern u32 *dq_map_table;
-extern u8 debug_training_hw_alg;
-
extern u32 start_xsb_offset;
extern u32 odt_config;