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-rw-r--r--drivers/fpga/ACEX1K.c37
-rw-r--r--drivers/fpga/Kconfig31
-rw-r--r--drivers/fpga/Makefile3
-rw-r--r--drivers/fpga/altera.c11
-rw-r--r--drivers/fpga/cyclon2.c38
-rw-r--r--drivers/fpga/fpga-uclass.c11
-rw-r--r--drivers/fpga/sandbox.c17
-rw-r--r--drivers/fpga/spartan2.c80
-rw-r--r--drivers/fpga/spartan3.c80
-rw-r--r--drivers/fpga/virtex2.c69
10 files changed, 202 insertions, 175 deletions
diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c
index aca8049c56a..a1ff47035be 100644
--- a/drivers/fpga/ACEX1K.c
+++ b/drivers/fpga/ACEX1K.c
@@ -7,18 +7,14 @@
* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include <common.h> /* core U-Boot definitions */
#include <console.h>
+#include <log.h>
#include <ACEX1K.h> /* ACEX device family */
#include <linux/delay.h>
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
/* Note: The assumption is that we cannot possibly run fast enough to
* overrun the device (the Slave Parallel mode can free run at 50MHz).
* If there is a need to operate slower, define CONFIG_FPGA_DELAY in
@@ -44,7 +40,7 @@ int ACEX1K_load(Altera_desc *desc, const void *buf, size_t bsize)
switch (desc->iface) {
case passive_serial:
- PRINTF ("%s: Launching Passive Serial Loader\n", __FUNCTION__);
+ log_debug("Launching Passive Serial Loader\n");
ret_val = ACEX1K_ps_load (desc, buf, bsize);
break;
@@ -64,7 +60,7 @@ int ACEX1K_dump(Altera_desc *desc, const void *buf, size_t bsize)
switch (desc->iface) {
case passive_serial:
- PRINTF ("%s: Launching Passive Serial Dump\n", __FUNCTION__);
+ log_debug("Launching Passive Serial Dump\n");
ret_val = ACEX1K_ps_dump (desc, buf, bsize);
break;
@@ -93,8 +89,7 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
Altera_ACEX1K_Passive_Serial_fns *fn = desc->iface_fns;
int i;
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
size_t bytecount = 0;
@@ -102,16 +97,16 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "config:\t0x%p\n"
- "status:\t0x%p\n"
- "clk:\t0x%p\n"
- "data:\t0x%p\n"
- "done:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->config, fn->status,
- fn->clk, fn->data, fn->done);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "config:\t0x%p\n"
+ "status:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "data:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ &fn, fn, fn->config, fn->status,
+ fn->clk, fn->data, fn->done);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
printf ("Loading FPGA Device %d...", cookie);
#endif
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index e07a9cf80ea..813d6a836d9 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -27,6 +27,12 @@ config FPGA_STRATIX_V
help
Say Y here to enable the Altera Stratix V FPGA specific driver.
+config FPGA_ACEX1K
+ bool "Enable Altera ACEX 1K driver"
+ depends on FPGA_ALTERA
+ help
+ Say Y here to enable the Altera ACEX 1K FPGA specific driver.
+
config FPGA_CYCLON2
bool "Enable Altera FPGA driver for Cyclone II"
depends on FPGA_ALTERA
@@ -71,6 +77,12 @@ config FPGA_VERSALPL
Versal. The bitstream will only be generated as PDI for Versal
platform.
+config FPGA_SPARTAN2
+ bool "Enable Spartan2 FPGA driver"
+ depends on FPGA_XILINX
+ help
+ Enable Spartan2 FPGA driver.
+
config FPGA_SPARTAN3
bool "Enable Spartan3 FPGA driver"
depends on FPGA_XILINX
@@ -118,4 +130,23 @@ config SPL_FPGA_LOAD_SECURE
Enables the fpga loads() functions that are used to load secure
(authenticated or encrypted or both) bitstreams on to FPGA.
+config DM_FPGA
+ bool "Enable Driver Model for FPGA drivers"
+ depends on DM
+ select FPGA
+ help
+ Enable driver model for Field-Programmable Gate Array (FPGA) devices.
+ The devices cover a wide range of applications and are configured at
+ runtime by loading a bitstream into the FPGA device.
+ Loading a bitstream from any kind of storage is the main task of the
+ FPGA drivers.
+ For now this uclass has no methods yet.
+
+config SANDBOX_FPGA
+ bool "Enable sandbox FPGA driver"
+ depends on SANDBOX && DM_FPGA
+ help
+ This is a driver model based FPGA driver for sandbox.
+ Currently it is a stub only, as there are no usable uclass methods yet.
+
endmenu
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 83243fb1070..610c168fc35 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -4,6 +4,9 @@
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y += fpga.o
+obj-$(CONFIG_DM_FPGA) += fpga-uclass.o
+obj-$(CONFIG_SANDBOX_FPGA) += sandbox.o
+
obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
obj-$(CONFIG_FPGA_VERSALPL) += versalpl.o
diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index 10c0475d259..6a4f0cb9bc0 100644
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -7,6 +7,8 @@
* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
/*
* Altera FPGA support
*/
@@ -16,9 +18,6 @@
#include <log.h>
#include <stratixII.h>
-/* Define FPGA_DEBUG to 1 to get debug printf's */
-#define FPGA_DEBUG 0
-
static const struct altera_fpga {
enum altera_family family;
const char *name;
@@ -106,8 +105,7 @@ int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
if (!fpga)
return FPGA_FAIL;
- debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n",
- __func__, fpga->name);
+ log_debug("Launching the %s Loader...\n", fpga->name);
if (fpga->load)
return fpga->load(desc, buf, bsize);
return 0;
@@ -120,8 +118,7 @@ int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
if (!fpga)
return FPGA_FAIL;
- debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n",
- __func__, fpga->name);
+ log_debug("Launching the %s Reader...\n", fpga->name);
if (fpga->dump)
return fpga->dump(desc, buf, bsize);
return 0;
diff --git a/drivers/fpga/cyclon2.c b/drivers/fpga/cyclon2.c
index 3b008facb8c..f264ff8c0ec 100644
--- a/drivers/fpga/cyclon2.c
+++ b/drivers/fpga/cyclon2.c
@@ -5,18 +5,14 @@
* Based on ACE1XK.c
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include <common.h> /* core U-Boot definitions */
+#include <log.h>
#include <altera.h>
#include <ACEX1K.h> /* ACEX device family */
#include <linux/delay.h>
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt, args...) printf(fmt, ##args)
-#else
-#define PRINTF(fmt, args...)
-#endif
-
/* Note: The assumption is that we cannot possibly run fast enough to
* overrun the device (the Slave Parallel mode can free run at 50MHz).
* If there is a need to operate slower, define CONFIG_FPGA_DELAY in
@@ -42,7 +38,7 @@ int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize)
switch (desc->iface) {
case passive_serial:
- PRINTF("%s: Launching Passive Serial Loader\n", __func__);
+ log_debug("Launching Passive Serial Loader\n");
ret_val = CYC2_ps_load(desc, buf, bsize);
break;
@@ -51,8 +47,7 @@ int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize)
* done in the write() callback. Use the existing PS load
* function for FPP, too.
*/
- PRINTF("%s: Launching Fast Passive Parallel Loader\n",
- __func__);
+ log_debug("Launching Fast Passive Parallel Loader\n");
ret_val = CYC2_ps_load(desc, buf, bsize);
break;
@@ -72,7 +67,7 @@ int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize)
switch (desc->iface) {
case passive_serial:
- PRINTF("%s: Launching Passive Serial Dump\n", __func__);
+ log_debug("Launching Passive Serial Dump\n");
ret_val = CYC2_ps_dump(desc, buf, bsize);
break;
@@ -99,22 +94,21 @@ static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns;
int ret = 0;
- PRINTF("%s: start with interface functions @ 0x%p\n",
- __func__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "config:\t0x%p\n"
- "status:\t0x%p\n"
- "write:\t0x%p\n"
- "done:\t0x%p\n\n",
- __func__, &fn, fn, fn->config, fn->status,
- fn->write, fn->done);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "config:\t0x%p\n"
+ "status:\t0x%p\n"
+ "write:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ &fn, fn, fn->config, fn->status,
+ fn->write, fn->done);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
printf("Loading FPGA Device %d...", cookie);
#endif
diff --git a/drivers/fpga/fpga-uclass.c b/drivers/fpga/fpga-uclass.c
new file mode 100644
index 00000000000..4278ec28e56
--- /dev/null
+++ b/drivers/fpga/fpga-uclass.c
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Alexander Dahl <post@lespocky.de>
+ */
+
+#include <dm.h>
+
+UCLASS_DRIVER(fpga) = {
+ .name = "fpga",
+ .id = UCLASS_FPGA,
+};
diff --git a/drivers/fpga/sandbox.c b/drivers/fpga/sandbox.c
new file mode 100644
index 00000000000..f17a8221795
--- /dev/null
+++ b/drivers/fpga/sandbox.c
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Alexander Dahl <post@lespocky.de>
+ */
+
+#include <dm.h>
+
+static const struct udevice_id sandbox_fpga_match[] = {
+ { .compatible = "sandbox,fpga" },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(sandbox_fpga) = {
+ .name = "sandbox_fpga",
+ .id = UCLASS_FPGA,
+ .of_match = sandbox_fpga_match,
+};
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 47692e32076..f72dfdec94e 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -4,16 +4,12 @@
* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include <common.h> /* core U-Boot definitions */
+#include <log.h>
#include <spartan2.h> /* Spartan-II device family */
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
#undef CONFIG_SYS_FPGA_CHECK_BUSY
/* Note: The assumption is that we cannot possibly run fast enough to
@@ -46,12 +42,12 @@ static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
switch (desc->iface) {
case slave_serial:
- PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
+ log_debug("Launching Slave Serial Load\n");
ret_val = spartan2_ss_load(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
+ log_debug("Launching Slave Parallel Load\n");
ret_val = spartan2_sp_load(desc, buf, bsize);
break;
@@ -69,12 +65,12 @@ static int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
switch (desc->iface) {
case slave_serial:
- PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
+ log_debug("Launching Slave Serial Dump\n");
ret_val = spartan2_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
+ log_debug("Launching Slave Parallel Dump\n");
ret_val = spartan2_sp_dump(desc, buf, bsize);
break;
@@ -100,8 +96,7 @@ static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
int ret_val = FPGA_FAIL; /* assume the worst */
xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
size_t bytecount = 0;
@@ -109,24 +104,24 @@ static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pre: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "err:\t0x%p\n"
- "clk:\t0x%p\n"
- "cs:\t0x%p\n"
- "wr:\t0x%p\n"
- "read data:\t0x%p\n"
- "write data:\t0x%p\n"
- "busy:\t0x%p\n"
- "abort:\t0x%p\n",
- "post:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
- fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
- fn->abort, fn->post);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pre: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "err:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "cs:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "read data:\t0x%p\n"
+ "write data:\t0x%p\n"
+ "busy:\t0x%p\n"
+ "abort:\t0x%p\n"
+ "post:\t0x%p\n\n",
+ &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
+ fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
+ fn->abort, fn->post);
/*
* This code is designed to emulate the "Express Style"
@@ -302,8 +297,7 @@ static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
int i;
unsigned char val;
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
size_t bytecount = 0;
@@ -311,16 +305,16 @@ static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "clk:\t0x%p\n"
- "wr:\t0x%p\n"
- "done:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->pgm, fn->init,
- fn->clk, fn->wr, fn->done);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ &fn, fn, fn->pgm, fn->init,
+ fn->clk, fn->wr, fn->done);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
printf ("Loading FPGA Device %d...\n", cookie);
#endif
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 918f6db5065..b7a063a95fc 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -9,16 +9,12 @@
* on spartan2.c (Rich Ireland, rireland@enterasys.com).
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include <common.h> /* core U-Boot definitions */
+#include <log.h>
#include <spartan3.h> /* Spartan-II device family */
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
#undef CONFIG_SYS_FPGA_CHECK_BUSY
/* Note: The assumption is that we cannot possibly run fast enough to
@@ -51,12 +47,12 @@ static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
switch (desc->iface) {
case slave_serial:
- PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
+ log_debug("Launching Slave Serial Load\n");
ret_val = spartan3_ss_load(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
+ log_debug("Launching Slave Parallel Load\n");
ret_val = spartan3_sp_load(desc, buf, bsize);
break;
@@ -74,12 +70,12 @@ static int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize)
switch (desc->iface) {
case slave_serial:
- PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
+ log_debug("Launching Slave Serial Dump\n");
ret_val = spartan3_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
+ log_debug("Launching Slave Parallel Dump\n");
ret_val = spartan3_sp_dump(desc, buf, bsize);
break;
@@ -105,8 +101,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
int ret_val = FPGA_FAIL; /* assume the worst */
xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns;
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
size_t bytecount = 0;
@@ -114,24 +109,24 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pre: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "err:\t0x%p\n"
- "clk:\t0x%p\n"
- "cs:\t0x%p\n"
- "wr:\t0x%p\n"
- "read data:\t0x%p\n"
- "write data:\t0x%p\n"
- "busy:\t0x%p\n"
- "abort:\t0x%p\n",
- "post:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
- fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
- fn->abort, fn->post);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pre: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "err:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "cs:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "read data:\t0x%p\n"
+ "write data:\t0x%p\n"
+ "busy:\t0x%p\n"
+ "abort:\t0x%p\n"
+ "post:\t0x%p\n\n",
+ &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
+ fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
+ fn->abort, fn->post);
/*
* This code is designed to emulate the "Express Style"
@@ -309,8 +304,7 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
int i;
unsigned char val;
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
size_t bytecount = 0;
@@ -318,16 +312,16 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "clk:\t0x%p\n"
- "wr:\t0x%p\n"
- "done:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->pgm, fn->init,
- fn->clk, fn->wr, fn->done);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ &fn, fn, fn->pgm, fn->init,
+ fn->clk, fn->wr, fn->done);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
printf ("Loading FPGA Device %d...\n", cookie);
#endif
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index 51b8d312056..0d536f0d044 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -12,21 +12,14 @@
* on spartan2.c (Rich Ireland, rireland@enterasys.com).
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include <common.h>
#include <console.h>
+#include <log.h>
#include <virtex2.h>
#include <linux/delay.h>
-#if 0
-#define FPGA_DEBUG
-#endif
-
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt, args...) printf(fmt, ##args)
-#else
-#define PRINTF(fmt, args...)
-#endif
-
/*
* If the SelectMap interface can be overrun by the processor, define
* CONFIG_SYS_FPGA_CHECK_BUSY and/or CONFIG_FPGA_DELAY in the board
@@ -89,12 +82,12 @@ static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
switch (desc->iface) {
case slave_serial:
- PRINTF("%s: Launching Slave Serial Load\n", __func__);
+ log_debug("Launching Slave Serial Load\n");
ret_val = virtex2_ss_load(desc, buf, bsize);
break;
case slave_selectmap:
- PRINTF("%s: Launching Slave Parallel Load\n", __func__);
+ log_debug("Launching Slave Parallel Load\n");
ret_val = virtex2_ssm_load(desc, buf, bsize);
break;
@@ -111,12 +104,12 @@ static int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
switch (desc->iface) {
case slave_serial:
- PRINTF("%s: Launching Slave Serial Dump\n", __func__);
+ log_debug("Launching Slave Serial Dump\n");
ret_val = virtex2_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF("%s: Launching Slave Parallel Dump\n", __func__);
+ log_debug("Launching Slave Parallel Dump\n");
ret_val = virtex2_ssm_dump(desc, buf, bsize);
break;
@@ -150,8 +143,7 @@ static int virtex2_slave_pre(xilinx_virtex2_slave_fns *fn, int cookie)
{
unsigned long ts;
- PRINTF("%s:%d: Start with interface functions @ 0x%p\n",
- __func__, __LINE__, fn);
+ log_debug("Start with interface functions @ 0x%p\n", fn);
if (!fn) {
printf("%s:%d: NULL Interface function table!\n",
@@ -160,25 +152,24 @@ static int virtex2_slave_pre(xilinx_virtex2_slave_fns *fn, int cookie)
}
/* Gotta split this one up (so the stack won't blow??) */
- PRINTF("%s:%d: Function Table:\n"
- " base 0x%p\n"
- " struct 0x%p\n"
- " pre 0x%p\n"
- " prog 0x%p\n"
- " init 0x%p\n"
- " error 0x%p\n",
- __func__, __LINE__,
- &fn, fn, fn->pre, fn->pgm, fn->init, fn->err);
- PRINTF(" clock 0x%p\n"
- " cs 0x%p\n"
- " write 0x%p\n"
- " rdata 0x%p\n"
- " wdata 0x%p\n"
- " busy 0x%p\n"
- " abort 0x%p\n"
- " post 0x%p\n\n",
- fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
- fn->busy, fn->abort, fn->post);
+ log_debug("Function Table:\n"
+ " base 0x%p\n"
+ " struct 0x%p\n"
+ " pre 0x%p\n"
+ " prog 0x%p\n"
+ " init 0x%p\n"
+ " error 0x%p\n",
+ &fn, fn, fn->pre, fn->pgm, fn->init, fn->err);
+ log_debug(" clock 0x%p\n"
+ " cs 0x%p\n"
+ " write 0x%p\n"
+ " rdata 0x%p\n"
+ " wdata 0x%p\n"
+ " busy 0x%p\n"
+ " abort 0x%p\n"
+ " post 0x%p\n\n",
+ fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
+ fn->busy, fn->abort, fn->post);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
printf("Initializing FPGA Device %d...\n", cookie);
@@ -330,8 +321,8 @@ static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize)
#endif
if ((*fn->done)(cookie) == FPGA_SUCCESS) {
- PRINTF("%s:%d:done went active early, bytecount = %d\n",
- __func__, __LINE__, bytecount);
+ log_debug("done went active early, bytecount = %zu\n",
+ bytecount);
break;
}
@@ -465,8 +456,8 @@ static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
#endif
if ((*fn->done)(cookie) == FPGA_SUCCESS) {
- PRINTF("%s:%d:done went active early, bytecount = %d\n",
- __func__, __LINE__, bytecount);
+ log_debug("done went active early, bytecount = %zu\n",
+ bytecount);
break;
}
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-02 20:44:53 +0000