diff options
Diffstat (limited to 'drivers/gpio')
| -rw-r--r-- | drivers/gpio/Kconfig | 18 | ||||
| -rw-r--r-- | drivers/gpio/mxc_gpio.c | 12 | ||||
| -rw-r--r-- | drivers/gpio/pca953x.c | 10 | ||||
| -rw-r--r-- | drivers/gpio/tca642x.c | 6 |
4 files changed, 32 insertions, 14 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ff87fbfb397..365615a53f7 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -169,6 +169,10 @@ config FXL6408_GPIO This driver supports the Fairchild FXL6408 device. FXL6408 is a fully configurable 8-bit I2C-controlled GPIO expander. +config HIKEY_GPIO + bool "HI6220 GPIO driver" + depends on DM_GPIO + config INTEL_BROADWELL_GPIO bool "Intel Broadwell GPIO driver" depends on DM @@ -374,8 +378,13 @@ config XILINX_GPIO help This config enable the Xilinx GPIO driver for Microblaze. +config TCA642X + bool "TCA642x legacy GPIO driver" + config CMD_TCA642X bool "tca642x - Command to access tca642x state" + depends on TCA642X + default y help DEPRECATED - This needs conversion to driver model @@ -511,6 +520,10 @@ config SPL_DM_PCA953X Now, max 24 bits chips and PCA953X compatible chips are supported +config PCA953X + bool "NXP's PCA953X series I2C GPIO (legacy driver)" + depends on !DM_PCA953X + config MPC8XXX_GPIO bool "Freescale MPC8XXX GPIO driver" depends on DM_GPIO @@ -583,6 +596,11 @@ config ZYNQMP_GPIO_MODEPIN are accessed using xilinx firmware. In modepin register, [3:0] bits set direction, [7:4] bits read IO, [11:8] bits set/clear IO. +config SH_GPIO_PFC + bool "Pinmuxed GPIO support for SuperH" + depends on RCAR_GEN2 && !PINCTRL_PFC + default y + config SL28CPLD_GPIO bool "Kontron sl28cpld GPIO driver" depends on DM_GPIO && SL28CPLD diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 03471db9e80..1dec4e35e0a 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -44,13 +44,13 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#if defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ +#if defined(CONFIG_MX51) || \ defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || \ defined(CONFIG_ARCH_IMX8) || defined(CONFIG_IMXRT1050) [3] = GPIO4_BASE_ADDR, #endif -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || \ defined(CONFIG_ARCH_IMX8) || defined(CONFIG_IMXRT1050) [4] = GPIO5_BASE_ADDR, @@ -352,12 +352,12 @@ static const struct mxc_gpio_plat mxc_plat[] = { { 0, (struct gpio_regs *)GPIO1_BASE_ADDR }, { 1, (struct gpio_regs *)GPIO2_BASE_ADDR }, { 2, (struct gpio_regs *)GPIO3_BASE_ADDR }, -#if defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ +#if defined(CONFIG_MX51) || \ defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8) { 3, (struct gpio_regs *)GPIO4_BASE_ADDR }, #endif -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8) { 4, (struct gpio_regs *)GPIO5_BASE_ADDR }, #ifndef CONFIG_IMX8M @@ -376,12 +376,12 @@ U_BOOT_DRVINFOS(mxc_gpios) = { { "gpio_mxc", &mxc_plat[0] }, { "gpio_mxc", &mxc_plat[1] }, { "gpio_mxc", &mxc_plat[2] }, -#if defined(CONFIG_MX27) || defined(CONFIG_MX51) || \ +#if defined(CONFIG_MX51) || \ defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8) { "gpio_mxc", &mxc_plat[3] }, #endif -#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ +#if defined(CONFIG_MX53) || defined(CONFIG_MX6) || \ defined(CONFIG_IMX8M) || defined(CONFIG_ARCH_IMX8) { "gpio_mxc", &mxc_plat[4] }, #ifndef CONFIG_IMX8M diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c index 2fd2996798c..b5ed35256ee 100644 --- a/drivers/gpio/pca953x.c +++ b/drivers/gpio/pca953x.c @@ -14,8 +14,8 @@ #include <pca953x.h> /* Default to an address that hopefully won't corrupt other i2c devices */ -#ifndef CONFIG_SYS_I2C_PCA953X_ADDR -#define CONFIG_SYS_I2C_PCA953X_ADDR (~0) +#ifndef CFG_SYS_I2C_PCA953X_ADDR +#define CFG_SYS_I2C_PCA953X_ADDR (~0) #endif enum { @@ -26,14 +26,14 @@ enum { PCA953X_CMD_INVERT, }; -#ifdef CONFIG_SYS_I2C_PCA953X_WIDTH +#ifdef CFG_SYS_I2C_PCA953X_WIDTH struct pca953x_chip_ngpio { uint8_t chip; uint8_t ngpio; }; static struct pca953x_chip_ngpio pca953x_chip_ngpios[] = - CONFIG_SYS_I2C_PCA953X_WIDTH; + CFG_SYS_I2C_PCA953X_WIDTH; /* * Determine the number of GPIO pins supported. If we don't know we assume @@ -204,7 +204,7 @@ static struct cmd_tbl cmd_pca953x[] = { static int do_pca953x(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - static uint8_t chip = CONFIG_SYS_I2C_PCA953X_ADDR; + static uint8_t chip = CFG_SYS_I2C_PCA953X_ADDR; int ret = CMD_RET_USAGE, val; ulong ul_arg2 = 0; ulong ul_arg3 = 0; diff --git a/drivers/gpio/tca642x.c b/drivers/gpio/tca642x.c index 7f67f96b0ec..b07496e6e49 100644 --- a/drivers/gpio/tca642x.c +++ b/drivers/gpio/tca642x.c @@ -52,7 +52,7 @@ static int tca642x_reg_write(uchar chip, uint8_t addr, int ret; org_bus_num = i2c_get_bus_num(); - i2c_set_bus_num(CONFIG_SYS_I2C_TCA642X_BUS_NUM); + i2c_set_bus_num(CFG_SYS_I2C_TCA642X_BUS_NUM); if (i2c_read(chip, addr, 1, (uint8_t *)&valw, 1)) { printf("Could not read before writing\n"); @@ -76,7 +76,7 @@ static int tca642x_reg_read(uchar chip, uint8_t addr, uint8_t *data) int ret = 0; org_bus_num = i2c_get_bus_num(); - i2c_set_bus_num(CONFIG_SYS_I2C_TCA642X_BUS_NUM); + i2c_set_bus_num(CFG_SYS_I2C_TCA642X_BUS_NUM); if (i2c_read(chip, addr, 1, (u8 *)&valw, 1)) { ret = -1; goto error; @@ -242,7 +242,7 @@ static struct cmd_tbl cmd_tca642x[] = { static int do_tca642x(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - static uchar chip = CONFIG_SYS_I2C_TCA642X_ADDR; + static uchar chip = CFG_SYS_I2C_TCA642X_ADDR; int ret = CMD_RET_USAGE, val; int gpio_bank = 0; uint8_t bank_shift; |