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-rw-r--r--drivers/mmc/adi_sdhci.c1
-rw-r--r--drivers/mmc/cv1800b_sdhci.c2
-rw-r--r--drivers/mmc/iproc_sdhci.c2
-rw-r--r--drivers/mmc/mmc.c21
-rw-r--r--drivers/mmc/omap_hsmmc.c1
-rw-r--r--drivers/mmc/sdhci-cadence6.c18
-rw-r--r--drivers/mmc/socfpga_dw_mmc.c33
7 files changed, 35 insertions, 43 deletions
diff --git a/drivers/mmc/adi_sdhci.c b/drivers/mmc/adi_sdhci.c
index 65a22cefb71..f58897b5218 100644
--- a/drivers/mmc/adi_sdhci.c
+++ b/drivers/mmc/adi_sdhci.c
@@ -15,6 +15,7 @@
#include <malloc.h>
#include <sdhci.h>
#include <asm/cache.h>
+#include <linux/sizes.h>
/* 400KHz is max freq for card ID etc. Use that as min */
#define EMMC_MIN_FREQ 400000
diff --git a/drivers/mmc/cv1800b_sdhci.c b/drivers/mmc/cv1800b_sdhci.c
index 377e6a887df..036e798f374 100644
--- a/drivers/mmc/cv1800b_sdhci.c
+++ b/drivers/mmc/cv1800b_sdhci.c
@@ -19,6 +19,7 @@ struct cv1800b_sdhci_plat {
struct mmc mmc;
};
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static void cv1800b_set_tap_delay(struct sdhci_host *host, u16 tap)
{
sdhci_writel(host, PHY_TX_SRC_INVERT | tap << 16, SDHCI_PHY_TX_RX_DLY);
@@ -31,7 +32,6 @@ static void cv1800b_sdhci_reset(struct sdhci_host *host, u8 mask)
udelay(10);
}
-#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static int cv1800b_execute_tuning(struct mmc *mmc, u8 opcode)
{
struct sdhci_host *host = dev_get_priv(mmc->dev);
diff --git a/drivers/mmc/iproc_sdhci.c b/drivers/mmc/iproc_sdhci.c
index 7ab74ff117a..654672a546f 100644
--- a/drivers/mmc/iproc_sdhci.c
+++ b/drivers/mmc/iproc_sdhci.c
@@ -182,7 +182,7 @@ static int sdhci_iproc_execute_tuning(struct mmc *mmc, u8 opcode)
u32 ctrl;
u32 blocksize = SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 64);
struct sdhci_host *host = dev_get_priv(mmc->dev);
- char tuning_loop_counter = MAX_TUNING_LOOP;
+ s8 tuning_loop_counter = MAX_TUNING_LOOP;
int ret = 0;
sdhci_start_tuning(host);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 5f2efbe6df9..ec61ed92e86 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -104,8 +104,7 @@ __weak int board_mmc_getcd(struct mmc *mmc)
return -1;
}
#endif
-
-#ifdef CONFIG_MMC_TRACE
+#if IS_ENABLED(CONFIG_MMC_TRACE)
void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
{
printf("CMD_SEND:%d\n", cmd->cmdidx);
@@ -125,21 +124,21 @@ void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
printf("\t\tMMC_RSP_NONE\n");
break;
case MMC_RSP_R1:
- printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08x \n",
+ printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08x\n",
cmd->response[0]);
break;
case MMC_RSP_R1b:
- printf("\t\tMMC_RSP_R1b\t\t 0x%08x \n",
+ printf("\t\tMMC_RSP_R1b\t\t 0x%08x\n",
cmd->response[0]);
break;
case MMC_RSP_R2:
- printf("\t\tMMC_RSP_R2\t\t 0x%08x \n",
+ printf("\t\tMMC_RSP_R2\t\t 0x%08x\n",
cmd->response[0]);
- printf("\t\t \t\t 0x%08x \n",
+ printf("\t\t \t\t 0x%08x\n",
cmd->response[1]);
- printf("\t\t \t\t 0x%08x \n",
+ printf("\t\t \t\t 0x%08x\n",
cmd->response[2]);
- printf("\t\t \t\t 0x%08x \n",
+ printf("\t\t \t\t 0x%08x\n",
cmd->response[3]);
printf("\n");
printf("\t\t\t\t\tDUMPING DATA\n");
@@ -154,7 +153,7 @@ void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
}
break;
case MMC_RSP_R3:
- printf("\t\tMMC_RSP_R3,4\t\t 0x%08x \n",
+ printf("\t\tMMC_RSP_R3,4\t\t 0x%08x\n",
cmd->response[0]);
break;
default:
@@ -1547,7 +1546,7 @@ static int sd_select_bus_width(struct mmc *mmc, int w)
}
#endif
-#if CONFIG_IS_ENABLED(MMC_WRITE)
+#if CONFIG_IS_ENABLED(MMC_WRITE) && !CONFIG_IS_ENABLED(MMC_TINY)
static int sd_read_ssr(struct mmc *mmc)
{
static const unsigned int sd_au_size[] = {
@@ -3190,7 +3189,7 @@ static int mmc_probe(struct bd_info *bis)
int mmc_initialize(struct bd_info *bis)
{
- static int initialized = 0;
+ static int initialized;
int ret;
if (initialized) /* Avoid initializing mmc multiple times */
return 0;
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 92bc72b267c..ae742080643 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -651,6 +651,7 @@ static int omap_hsmmc_execute_tuning(struct udevice *dev, uint opcode)
printf("Couldn't get temperature for tuning\n");
return ret;
}
+ temperature /= 1000;
val = readl(&mmc_base->dll);
val |= DLL_SWT;
writel(val, &mmc_base->dll);
diff --git a/drivers/mmc/sdhci-cadence6.c b/drivers/mmc/sdhci-cadence6.c
index 9a92b8437a6..ead96dc0c91 100644
--- a/drivers/mmc/sdhci-cadence6.c
+++ b/drivers/mmc/sdhci-cadence6.c
@@ -180,10 +180,8 @@ static int sdhci_cdns6_reset_phy_dll(struct sdhci_cdns_plat *plat, bool reset)
int sdhci_cdns6_phy_adj(struct udevice *dev, struct sdhci_cdns_plat *plat, u32 mode)
{
- DECLARE_GLOBAL_DATA_PTR;
struct sdhci_cdns6_phy_cfg *sdhci_cdns6_phy_cfgs;
struct sdhci_cdns6_ctrl_cfg *sdhci_cdns6_ctrl_cfgs;
- const fdt32_t *prop;
u32 tmp;
int i, ret;
@@ -216,19 +214,11 @@ int sdhci_cdns6_phy_adj(struct udevice *dev, struct sdhci_cdns_plat *plat, u32 m
return -EINVAL;
}
- for (i = 0; i < SDHCI_CDNS6_PHY_CFG_NUM; i++) {
- prop = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
- sdhci_cdns6_phy_cfgs[i].property, NULL);
- if (prop)
- sdhci_cdns6_phy_cfgs[i].val = *prop;
- }
+ for (i = 0; i < SDHCI_CDNS6_PHY_CFG_NUM; i++)
+ dev_read_u32(dev, sdhci_cdns6_phy_cfgs[i].property, &sdhci_cdns6_phy_cfgs[i].val);
- for (i = 0; i < SDHCI_CDNS6_CTRL_CFG_NUM; i++) {
- prop = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
- sdhci_cdns6_ctrl_cfgs[i].property, NULL);
- if (prop)
- sdhci_cdns6_ctrl_cfgs[i].val = *prop;
- }
+ for (i = 0; i < SDHCI_CDNS6_CTRL_CFG_NUM; i++)
+ dev_read_u32(dev, sdhci_cdns6_ctrl_cfgs[i].property, &sdhci_cdns6_ctrl_cfgs[i].val);
/* Switch On the DLL Reset */
sdhci_cdns6_reset_phy_dll(plat, true);
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 3b86bc9b18c..db4e0129c2e 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -29,7 +29,9 @@ struct socfpga_dwmci_plat {
/* socfpga implmentation specific driver private data */
struct dwmci_socfpga_priv_data {
+ struct udevice *dev;
struct dwmci_host host;
+ struct clk mmc_clk_ciu;
unsigned int drvsel;
unsigned int smplsel;
};
@@ -51,28 +53,23 @@ static void socfpga_dwmci_reset(struct udevice *dev)
static int socfpga_dwmci_clksel(struct dwmci_host *host)
{
struct dwmci_socfpga_priv_data *priv = host->priv;
+ int ret;
+
u32 sdmmc_mask = ((priv->smplsel & 0x7) << SYSMGR_SDMMC_SMPLSEL_SHIFT) |
((priv->drvsel & 0x7) << SYSMGR_SDMMC_DRVSEL_SHIFT);
- /* Get clock manager base address */
- struct udevice *clkmgr_dev;
- int ret = uclass_get_device_by_name(UCLASS_CLK, "clock-controller@ffd10000", &clkmgr_dev);
-
+ ret = clk_get_by_name(priv->dev, "ciu", &priv->mmc_clk_ciu);
if (ret) {
- printf("Failed to get clkmgr device: %d\n", ret);
+ debug("%s: Failed to get SDMMC clock from dts\n", __func__);
return ret;
}
- fdt_addr_t clkmgr_base = dev_read_addr(clkmgr_dev);
-
- if (clkmgr_base == FDT_ADDR_T_NONE) {
- printf("Failed to read base address from clkmgr DT node\n");
- return -EINVAL;
- }
-
/* Disable SDMMC clock. */
- clrbits_le32(clkmgr_base + CLKMGR_PERPLL_EN,
- CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK);
+ ret = clk_disable(&priv->mmc_clk_ciu);
+ if (ret) {
+ printf("%s: Failed to disable SDMMC clock\n", __func__);
+ return ret;
+ }
debug("%s: drvsel %d smplsel %d\n", __func__,
priv->drvsel, priv->smplsel);
@@ -92,8 +89,11 @@ static int socfpga_dwmci_clksel(struct dwmci_host *host)
#endif
/* Enable SDMMC clock */
- setbits_le32(clkmgr_base + CLKMGR_PERPLL_EN,
- CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK);
+ ret = clk_enable(&priv->mmc_clk_ciu);
+ if (ret) {
+ printf("%s: Failed to enable SDMMC clock\n", __func__);
+ return ret;
+ }
return 0;
}
@@ -169,6 +169,7 @@ static int socfpga_dwmmc_probe(struct udevice *dev)
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
+ priv->dev = dev;
int ret;
ret = socfpga_dwmmc_get_clk_rate(dev);
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-11 19:34:07 +0000