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Diffstat (limited to 'drivers/mtd/nand/raw/mxs_nand.c')
-rw-r--r--drivers/mtd/nand/raw/mxs_nand.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
index 80d9307cdd1..ba67466069b 100644
--- a/drivers/mtd/nand/raw/mxs_nand.c
+++ b/drivers/mtd/nand/raw/mxs_nand.c
@@ -1507,8 +1507,18 @@ static void mxs_compute_timings(struct nand_chip *chip,
writel(GPMI_CTRL1_CLEAR_MASK, &nand_info->gpmi_regs->hw_gpmi_ctrl1_clr);
writel(ctrl1n, &nand_info->gpmi_regs->hw_gpmi_ctrl1_set);
+ /* Clock dividers do NOT guarantee a clean clock signal on its output
+ * during the change of the divide factor on i.MX6Q/UL/SX. On i.MX7/8,
+ * all clock dividers provide these guarantee.
+ */
+ if (IS_ENABLED(CONFIG_MX6ULL))
+ clk_disable(nand_info->gpmi_clk);
+
clk_set_rate(nand_info->gpmi_clk, clk_rate);
+ if (IS_ENABLED(CONFIG_MX6ULL))
+ clk_enable(nand_info->gpmi_clk);
+
/* Wait 64 clock cycles before using the GPMI after enabling the DLL */
dll_wait_time_us = USEC_PER_SEC / clk_rate * 64;
if (!dll_wait_time_us)