6 files changed, 517 insertions, 5 deletions

diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index 21f81b66099..320aba33347 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -68,6 +68,13 @@ config PINCTRL_QCOM_SC7280
 	help
 	  Say Y here to enable support for pinctrl on the Snapdragon SC7280 SoC,
 
+config PINCTRL_QCOM_SDM670
+	bool "Qualcomm SDM670 Pinctrl"
+	select PINCTRL_QCOM
+	help
+	  Say Y here to enable support for pinctrl on the Snapdragon SDM670 SoC,
+	  as well as the associated GPIO driver.
+
 config PINCTRL_QCOM_SDM660
 	bool "Qualcomm SDM630/660 Pinctrl"
 	select PINCTRL_QCOM
@@ -89,6 +96,19 @@ config PINCTRL_QCOM_SM6115
 	  Say Y here to enable support for pinctrl on the Snapdragon SM6115 SoC,
 	  as well as the associated GPIO driver.
 
+config PINCTRL_QCOM_SM6350
+	bool "Qualcomm SM6350 Pinctrl"
+	select PINCTRL_QCOM
+	help
+	  Say Y here to enable support for pinctrl on the Snapdragon SM6350 SoC,
+
+config PINCTRL_QCOM_SM7150
+	bool "Qualcomm SM7150 GCC"
+	select PINCTRL_QCOM
+	help
+	  Say Y here to enable support for pinctrl on the Snapdragon SM7150 SoC,
+	  as well as the associated GPIO driver.
+
 config PINCTRL_QCOM_SM8150
 	bool "Qualcomm SM8150 Pinctrl"
 	select PINCTRL_QCOM
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index 6cb53838e71..06582ac2068 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -13,8 +13,11 @@ obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o
 obj-$(CONFIG_PINCTRL_QCOM_SA8775P) += pinctrl-sa8775p.o
 obj-$(CONFIG_PINCTRL_QCOM_SC7280) += pinctrl-sc7280.o
 obj-$(CONFIG_PINCTRL_QCOM_SDM660) += pinctrl-sdm660.o
+obj-$(CONFIG_PINCTRL_QCOM_SDM670) += pinctrl-sdm670.o
 obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o
 obj-$(CONFIG_PINCTRL_QCOM_SM6115) += pinctrl-sm6115.o
+obj-$(CONFIG_PINCTRL_QCOM_SM6350) += pinctrl-sm6350.o
+obj-$(CONFIG_PINCTRL_QCOM_SM7150) += pinctrl-sm7150.o
 obj-$(CONFIG_PINCTRL_QCOM_SM8150) += pinctrl-sm8150.o
 obj-$(CONFIG_PINCTRL_QCOM_SM8250) += pinctrl-sm8250.o
 obj-$(CONFIG_PINCTRL_QCOM_SM8550) += pinctrl-sm8550.o
diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280.c b/drivers/pinctrl/qcom/pinctrl-sc7280.c
index fe87947fbbf..d62b2cc6fb6 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc7280.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc7280.c
@@ -10,10 +10,6 @@
 
 #include "pinctrl-qcom.h"
 
-#define WEST 0x00000000
-#define SOUTH 0x00400000
-#define NORTH 0x00800000
-
 #define MAX_PIN_NAME_LEN 32
 static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
 
@@ -47,7 +43,7 @@ static const struct pinctrl_function msm_pinctrl_functions[] = {
 	}
 
 static const struct msm_special_pin_data sc7280_special_pins_data[] = {
-	[0] = UFS_RESET("ufs_reset", SOUTH + 0xbe000),
+	[0] = UFS_RESET("ufs_reset", 0xbe000),
 	[1] = SDC_PINGROUP("sdc1_rclk", 0xb3004, 0, 6),
 	[2] = SDC_PINGROUP("sdc1_clk", 0xb3000, 13, 6),
 	[3] = SDC_PINGROUP("sdc1_cmd", 0xb3000, 11, 3),
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm670.c b/drivers/pinctrl/qcom/pinctrl-sdm670.c
new file mode 100644
index 00000000000..830fe7d826f
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sdm670.c
@@ -0,0 +1,247 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm SDM670 pinctrl
+ *
+ * (C) Copyright 2025 David Wronek <david.wronek@mainlining.org>
+ */
+
+#include <dm.h>
+#include "pinctrl-qcom.h"
+
+#define NORTH	0x00500000
+#define SOUTH	0x00900000
+#define WEST	0x00100000
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function sdm670_pinctrl_functions[] = {
+	{ "gpio", 0 },
+	{ "blsp_uart2", 3 }, /* gpio 4 and 5, used for debug uart */
+};
+
+static const unsigned int sdm670_pin_offsets[] = {
+	[0] = SOUTH,
+	[1] = SOUTH,
+	[2] = SOUTH,
+	[3] = SOUTH,
+	[4] = NORTH,
+	[5] = NORTH,
+	[6] = NORTH,
+	[7] = NORTH,
+	[8] = WEST,
+	[9] = WEST,
+	[10] = NORTH,
+	[11] = NORTH,
+	[12] = SOUTH,
+	[13] = WEST,
+	[14] = WEST,
+	[15] = WEST,
+	[16] = WEST,
+	[17] = WEST,
+	[18] = WEST,
+	[19] = WEST,
+	[20] = WEST,
+	[21] = WEST,
+	[22] = WEST,
+	[23] = WEST,
+	[24] = WEST,
+	[25] = WEST,
+	[26] = WEST,
+	[27] = WEST,
+	[28] = WEST,
+	[29] = WEST,
+	[30] = WEST,
+	[31] = WEST,
+	[32] = WEST,
+	[33] = WEST,
+	[34] = WEST,
+	[35] = NORTH,
+	[36] = NORTH,
+	[37] = NORTH,
+	[38] = NORTH,
+	[39] = NORTH,
+	[40] = NORTH,
+	[41] = SOUTH,
+	[42] = SOUTH,
+	[43] = SOUTH,
+	[44] = SOUTH,
+	[45] = SOUTH,
+	[46] = SOUTH,
+	[47] = SOUTH,
+	[48] = SOUTH,
+	[49] = NORTH,
+	[50] = NORTH,
+	[51] = NORTH,
+	[52] = NORTH,
+	[53] = NORTH,
+	[54] = NORTH,
+	[55] = NORTH,
+	[56] = NORTH,
+	[57] = NORTH,
+	[65] = NORTH,
+	[66] = NORTH,
+	[67] = NORTH,
+	[68] = NORTH,
+	[75] = NORTH,
+	[76] = NORTH,
+	[77] = NORTH,
+	[78] = NORTH,
+	[79] = NORTH,
+	[80] = NORTH,
+	[81] = NORTH,
+	[82] = NORTH,
+	[83] = NORTH,
+	[84] = NORTH,
+	[85] = SOUTH,
+	[86] = SOUTH,
+	[87] = SOUTH,
+	[88] = SOUTH,
+	[89] = SOUTH,
+	[90] = SOUTH,
+	[91] = SOUTH,
+	[92] = SOUTH,
+	[93] = SOUTH,
+	[94] = SOUTH,
+	[95] = SOUTH,
+	[96] = SOUTH,
+	[97] = WEST,
+	[98] = WEST,
+	[99] = NORTH,
+	[100] = WEST,
+	[101] = WEST,
+	[102] = WEST,
+	[103] = WEST,
+	[105] = NORTH,
+	[106] = NORTH,
+	[107] = NORTH,
+	[108] = NORTH,
+	[109] = NORTH,
+	[110] = NORTH,
+	[111] = NORTH,
+	[112] = NORTH,
+	[113] = NORTH,
+	[114] = WEST,
+	[115] = WEST,
+	[116] = SOUTH,
+	[117] = NORTH,
+	[118] = NORTH,
+	[119] = NORTH,
+	[120] = NORTH,
+	[121] = NORTH,
+	[122] = NORTH,
+	[123] = NORTH,
+	[124] = NORTH,
+	[125] = NORTH,
+	[126] = NORTH,
+	[127] = WEST,
+	[128] = WEST,
+	[129] = WEST,
+	[130] = WEST,
+	[131] = WEST,
+	[132] = WEST,
+	[133] = NORTH,
+	[134] = NORTH,
+	[135] = WEST,
+	[136] = WEST,
+	[137] = WEST,
+	[138] = WEST,
+	[139] = WEST,
+	[140] = WEST,
+	[141] = WEST,
+	[142] = WEST,
+	[143] = WEST,
+	[144] = SOUTH,
+	[145] = SOUTH,
+	[146] = WEST,
+	[147] = WEST,
+	[148] = WEST,
+	[149] = WEST,
+};
+
+#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)	\
+{							\
+	.name = pg_name,				\
+	.ctl_reg = ctl,					\
+	.io_reg = 0,					\
+	.pull_bit = pull,				\
+	.drv_bit = drv,					\
+	.oe_bit = -1,					\
+	.in_bit = -1,					\
+	.out_bit = -1,					\
+}
+
+#define UFS_RESET(pg_name, offset)			\
+{							\
+	.name = pg_name,				\
+	.ctl_reg = offset,				\
+	.io_reg = offset + 0x4,				\
+	.pull_bit = 3,					\
+	.drv_bit = 0,					\
+	.oe_bit = -1,					\
+	.in_bit = -1,					\
+	.out_bit = 0,					\
+}
+
+static const struct msm_special_pin_data sdm670_special_pins_data[] = {
+	UFS_RESET("ufs_reset", 0x99d000),
+	SDC_QDSD_PINGROUP("sdc1_rclk", NORTH + 0x99000, 15, 0),
+	SDC_QDSD_PINGROUP("sdc1_clk",  NORTH + 0x99000, 13, 6),
+	SDC_QDSD_PINGROUP("sdc1_cmd",  NORTH + 0x99000, 11, 3),
+	SDC_QDSD_PINGROUP("sdc1_data", NORTH + 0x99000, 9,  0),
+	SDC_QDSD_PINGROUP("sdc2_clk",  NORTH + 0x9a000, 14, 6),
+	SDC_QDSD_PINGROUP("sdc2_cmd",  NORTH + 0x9a000, 11, 3),
+	SDC_QDSD_PINGROUP("sdc2_data", NORTH + 0x9a000, 9,  0),
+};
+
+static const char *sdm670_get_function_name(struct udevice *dev, unsigned int selector)
+{
+	return sdm670_pinctrl_functions[selector].name;
+}
+
+static const char *sdm670_get_pin_name(struct udevice *dev, unsigned int selector)
+{
+	if (selector >= 150 && selector <= 157)
+		snprintf(pin_name, MAX_PIN_NAME_LEN,
+			 sdm670_special_pins_data[selector - 150].name);
+	else
+		snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+
+	return pin_name;
+}
+
+static int sdm670_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector)
+{
+	if (selector >= 0 && selector < ARRAY_SIZE(sdm670_pinctrl_functions))
+		return sdm670_pinctrl_functions[selector].val;
+	return -EINVAL;
+}
+
+struct msm_pinctrl_data sdm670_data = {
+	.pin_data = {
+		.pin_offsets = sdm670_pin_offsets,
+		.pin_count = ARRAY_SIZE(sdm670_pin_offsets) + ARRAY_SIZE(sdm670_special_pins_data),
+		.special_pins_start = 150,
+		.special_pins_data = sdm670_special_pins_data,
+	},
+	.functions_count = ARRAY_SIZE(sdm670_pinctrl_functions),
+	.get_function_name = sdm670_get_function_name,
+	.get_function_mux = sdm670_get_function_mux,
+	.get_pin_name = sdm670_get_pin_name,
+};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+	{
+		.compatible = "qcom,sdm670-tlmm",
+		.data = (ulong)&sdm670_data
+	},
+	{ /* Sentinel */ }
+};
+
+U_BOOT_DRIVER(pinctrl_ssdm670) = {
+	.name = "pinctrl_sdm670",
+	.id = UCLASS_NOP,
+	.of_match = msm_pinctrl_ids,
+	.ops = &msm_pinctrl_ops,
+	.bind = msm_pinctrl_bind,
+};
diff --git a/drivers/pinctrl/qcom/pinctrl-sm6350.c b/drivers/pinctrl/qcom/pinctrl-sm6350.c
new file mode 100644
index 00000000000..1cbed77b55f
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sm6350.c
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm sm6350 pinctrl
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ * (C) Copyright 2025 Luca Weiss <luca.weiss@fairphone.com>
+ *
+ */
+
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function msm_pinctrl_functions[] = {
+	{"qup13_f2", 1},
+	{"gpio", 0},
+};
+
+#define SDC_PINGROUP(pg_name, ctl, pull, drv)		\
+	{						\
+		.name = pg_name,			\
+		.ctl_reg = ctl,				\
+		.io_reg = 0,				\
+		.pull_bit = pull,			\
+		.drv_bit = drv,				\
+		.oe_bit = -1,				\
+		.in_bit = -1,				\
+		.out_bit = -1,				\
+	}
+
+#define UFS_RESET(pg_name, offset)			\
+	{						\
+		.name = pg_name,			\
+		.ctl_reg = offset,			\
+		.io_reg = offset + 0x4,			\
+		.pull_bit = 3,				\
+		.drv_bit = 0,				\
+		.oe_bit = -1,				\
+		.in_bit = -1,				\
+		.out_bit = 0,				\
+	}
+
+static const struct msm_special_pin_data sm6350_special_pins_data[] = {
+	[0] = UFS_RESET("ufs_reset", 0xae000),
+	[1] = SDC_PINGROUP("sdc1_rclk", 0xa1000, 15, 0),
+	[2] = SDC_PINGROUP("sdc1_clk", 0xa0000, 13, 6),
+	[3] = SDC_PINGROUP("sdc1_cmd", 0xa0000, 11, 3),
+	[4] = SDC_PINGROUP("sdc1_data", 0xa0000, 9, 0),
+	[5] = SDC_PINGROUP("sdc2_clk", 0xa2000, 14, 6),
+	[6] = SDC_PINGROUP("sdc2_cmd", 0xa2000, 11, 3),
+	[7] = SDC_PINGROUP("sdc2_data", 0xa2000, 9, 0),
+};
+
+static const char *sm6350_get_function_name(struct udevice *dev,
+					    unsigned int selector)
+{
+	return msm_pinctrl_functions[selector].name;
+}
+
+static const char *sm6350_get_pin_name(struct udevice *dev,
+				       unsigned int selector)
+{
+	if (selector >= 156 && selector <= 163)
+		snprintf(pin_name, MAX_PIN_NAME_LEN,
+			 sm6350_special_pins_data[selector - 156].name);
+	else
+		snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+
+	return pin_name;
+}
+
+static int sm6350_get_function_mux(__maybe_unused unsigned int pin,
+				   unsigned int selector)
+{
+	return msm_pinctrl_functions[selector].val;
+}
+
+static struct msm_pinctrl_data sm6350_data = {
+	.pin_data = {
+		.pin_count = 164,
+		.special_pins_start = 156,
+		.special_pins_data = sm6350_special_pins_data,
+	},
+	.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
+	.get_function_name = sm6350_get_function_name,
+	.get_function_mux = sm6350_get_function_mux,
+	.get_pin_name = sm6350_get_pin_name,
+};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+	{ .compatible = "qcom,sm6350-tlmm", .data = (ulong)&sm6350_data },
+	{ /* Sentinel */ }
+};
+
+U_BOOT_DRIVER(pinctrl_sm6350) = {
+	.name		= "pinctrl_sm6350",
+	.id		= UCLASS_NOP,
+	.of_match	= msm_pinctrl_ids,
+	.ops		= &msm_pinctrl_ops,
+	.bind		= msm_pinctrl_bind,
+};
diff --git a/drivers/pinctrl/qcom/pinctrl-sm7150.c b/drivers/pinctrl/qcom/pinctrl-sm7150.c
new file mode 100644
index 00000000000..435ba39b1db
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sm7150.c
@@ -0,0 +1,142 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Pinctrl driver for Qualcomm SM7150
+ *
+ * (C) Copyright 2025 Danila Tikhonov <danila@jiaxyga.com>
+ * (C) Copyright 2025 Jens Reidel <adrian@mainlining.org>
+ *
+ * Based on Linux Kernel driver
+ */
+
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
+
+#define WEST	0x00000000
+#define NORTH	0x00400000
+#define SOUTH	0x00800000
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function msm_pinctrl_functions[] = {
+	{ "qup12", 1 },
+	{ "gpio",  0 },
+	{ "sdc2_clk", 0 } /* special pin GPIO124 */
+};
+
+#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)	\
+	{						\
+		.name = pg_name,			\
+		.ctl_reg = ctl,				\
+		.io_reg = 0,				\
+		.pull_bit = pull,			\
+		.drv_bit = drv,				\
+		.oe_bit = -1,				\
+		.in_bit = -1,				\
+		.out_bit = -1,				\
+	}
+
+#define UFS_RESET(pg_name, offset)			\
+	{						\
+		.name = pg_name,			\
+		.ctl_reg = offset,			\
+		.io_reg = offset + 0x4,			\
+		.pull_bit = 3,				\
+		.drv_bit = 0,				\
+		.oe_bit = -1,				\
+		.in_bit = -1,				\
+		.out_bit = 0,				\
+	}
+
+static const struct msm_special_pin_data msm_special_pins_data[] = {
+	[0] = UFS_RESET("ufs_reset", 0x9f000),
+	[1] = SDC_QDSD_PINGROUP("sdc1_rclk", WEST + 0x9a000, 15, 0),
+	[2] = SDC_QDSD_PINGROUP("sdc1_clk", WEST + 0x9a000, 13, 6),
+	[3] = SDC_QDSD_PINGROUP("sdc1_cmd", WEST + 0x9a000, 11, 3),
+	[4] = SDC_QDSD_PINGROUP("sdc1_data", WEST + 0x9a000, 9, 0),
+	[5] = SDC_QDSD_PINGROUP("sdc2_clk", SOUTH + 0x98000, 14, 6),
+	[6] = SDC_QDSD_PINGROUP("sdc2_cmd", SOUTH + 0x98000, 11, 3),
+	[7] = SDC_QDSD_PINGROUP("sdc2_data", SOUTH + 0x98000, 9, 0),
+};
+
+static const unsigned int sm7150_pin_offsets[] = {
+	[0] = SOUTH,	[1] = SOUTH,	[2] = SOUTH,	[3] = SOUTH,
+	[4] = NORTH,	[5] = NORTH,	[6] = NORTH,	[7] = NORTH,
+	[8] = NORTH,	[9] = NORTH,	[10] = NORTH,	[11] = NORTH,
+	[12] = SOUTH,	[13] = SOUTH,	[14] = SOUTH,	[15] = SOUTH,
+	[16] = SOUTH,	[17] = SOUTH,	[18] = SOUTH,	[19] = SOUTH,
+	[20] = SOUTH,	[21] = SOUTH,	[22] = SOUTH,	[23] = SOUTH,
+	[24] = SOUTH,	[25] = SOUTH,	[26] = SOUTH,	[27] = SOUTH,
+	[28] = SOUTH,	[29] = NORTH,	[30] = SOUTH,	[31] = WEST,
+	[32] = NORTH,	[33] = NORTH,	[34] = SOUTH,	[35] = SOUTH,
+	[36] = SOUTH,	[37] = SOUTH,	[38] = SOUTH,	[39] = SOUTH,
+	[40] = SOUTH,	[41] = SOUTH,	[42] = NORTH,	[43] = NORTH,
+	[44] = NORTH,	[45] = NORTH,	[46] = NORTH,	[47] = NORTH,
+	[48] = WEST,	[49] = WEST,	[50] = WEST,	[51] = WEST,
+	[52] = WEST,	[53] = WEST,	[54] = WEST,	[55] = WEST,
+	[56] = WEST,	[57] = WEST,	[58] = WEST,	[59] = NORTH,
+	[60] = NORTH,	[61] = NORTH,	[62] = NORTH,	[63] = NORTH,
+	[64] = NORTH,	[65] = NORTH,	[66] = NORTH,	[67] = NORTH,
+	[68] = NORTH,	[69] = NORTH,	[70] = NORTH,	[71] = NORTH,
+	[72] = NORTH,	[73] = NORTH,	[74] = WEST,	[75] = WEST,
+	[76] = WEST,	[77] = WEST,	[78] = WEST,	[79] = WEST,
+	[80] = WEST,	[81] = WEST,	[82] = WEST,	[83] = WEST,
+	[84] = WEST,	[85] = WEST,	[86] = NORTH,	[87] = NORTH,
+	[88] = NORTH,	[89] = NORTH,	[90] = NORTH,	[91] = NORTH,
+	[92] = NORTH,	[93] = NORTH,	[94] = SOUTH,	[95] = WEST,
+	[96] = WEST,	[97] = WEST,	[98] = WEST,	[99] = WEST,
+	[100] = WEST,	[101] = NORTH,	[102] = NORTH,	[103] = NORTH,
+	[104] = WEST,	[105] = NORTH,	[106] = NORTH,	[107] = WEST,
+	[108] = SOUTH,	[109] = SOUTH,	[110] = NORTH,	[111] = NORTH,
+	[112] = NORTH,	[113] = NORTH,	[114] = NORTH,	[115] = NORTH,
+	[116] = NORTH,	[117] = NORTH,	[118] = NORTH,
+};
+
+static const char *sm7150_get_function_name(struct udevice *dev, unsigned int selector)
+{
+	return msm_pinctrl_functions[selector].name;
+}
+
+static const char *sm7150_get_pin_name(struct udevice *dev,
+				       unsigned int selector)
+{
+	if (selector >= 119 && selector <= 126)
+		snprintf(pin_name, MAX_PIN_NAME_LEN,
+			 msm_special_pins_data[selector - 119].name);
+	else
+		snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+
+	return pin_name;
+}
+
+static int sm7150_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector)
+{
+	return msm_pinctrl_functions[selector].val;
+}
+
+static struct msm_pinctrl_data sm7150_data = {
+	.pin_data = {
+		.pin_offsets = sm7150_pin_offsets,
+		.pin_count = 126,
+		.special_pins_start = 119,
+		.special_pins_data = msm_special_pins_data,
+	},
+	.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
+	.get_function_name = sm7150_get_function_name,
+	.get_function_mux = sm7150_get_function_mux,
+	.get_pin_name = sm7150_get_pin_name,
+};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+	{ .compatible = "qcom,sm7150-tlmm", .data = (ulong)&sm7150_data },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(pinctrl_sm7150) = {
+	.name		= "pinctrl_sm7150",
+	.id		= UCLASS_NOP,
+	.of_match	= msm_pinctrl_ids,
+	.ops		= &msm_pinctrl_ops,
+	.bind		= msm_pinctrl_bind,
+};