diff options
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/Kconfig | 21 | ||||
| -rw-r--r-- | drivers/serial/Makefile | 1 | ||||
| -rw-r--r-- | drivers/serial/serial-uclass.c | 3 | ||||
| -rw-r--r-- | drivers/serial/serial_linflexuart.c | 216 | ||||
| -rw-r--r-- | drivers/serial/serial_lpuart.c | 2 | ||||
| -rw-r--r-- | drivers/serial/serial_xuartlite.c | 39 |
6 files changed, 44 insertions, 238 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 1f2f2468eb0..bc05d2f1508 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -665,6 +665,7 @@ config ARM_DCC config ATMEL_USART bool "Atmel USART support" + depends on ARCH_AT91 help Select this to enable USART support for Atmel SoCs. It can be configured in the device tree, and input clock frequency can @@ -703,8 +704,8 @@ config BCM6345_SERIAL config COREBOOT_SERIAL bool "Coreboot UART support" - depends on DM_SERIAL - default y if SYS_COREBOOT + depends on DM_SERIAL && SYS_COREBOOT + default y select SYS_NS16550 help Select this to enable a ns16550-style UART where the platform data @@ -724,20 +725,14 @@ config COREBOOT_SERIAL_FROM_DBG2 config CORTINA_UART bool "Cortina UART support" - depends on DM_SERIAL + depends on DM_SERIAL && TARGET_PRESIDIO_ASIC help Select this to enable UART support for Cortina-Access UART devices found on CAxxxx SoCs. -config FSL_LINFLEXUART - bool "Freescale Linflex UART support" - depends on DM_SERIAL - help - Select this to enable the Linflex serial module found on some - NXP SoCs like S32V234. - config FSL_LPUART bool "Freescale LPUART support" + depends on MACH_IMX || ARCH_LS1021A || ARCH_LS1028A help Select this to enable a Low Power UART for Freescale VF610 and QorIQ Layerscape devices. @@ -748,12 +743,14 @@ config LPUART config MVEBU_A3700_UART bool "UART support for Armada 3700" + depends on ARCH_MVEBU help Choose this option to add support for UART driver on the Marvell Armada 3700 SoC. The base address is configured via DT. config MCFUART bool "Freescale ColdFire UART support" + depends on M68K help Choose this option to add support for UART driver on the ColdFire SoC's family. The serial communication channel provides a full-duplex @@ -879,7 +876,7 @@ config PL01X_SERIAL config ROCKCHIP_SERIAL bool "Rockchip on-chip UART support" - depends on DM_SERIAL + depends on DM_SERIAL && ARCH_ROCKCHIP select SYS_NS16550 help Select this to enable a debug UART for Rockchip devices when using @@ -1110,7 +1107,7 @@ config MTK_SERIAL config MT7620_SERIAL bool "UART driver for MediaTek MT7620 and earlier SoCs" - depends on DM_SERIAL + depends on DM_SERIAL && SOC_MT7620 help Select this to enable UART support for MediaTek MT7620 and earlier SoCs. This driver uses driver model and requires a device tree diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index c32e3fcd439..8eaae62b0fc 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -36,7 +36,6 @@ obj-$(CONFIG_SCIF_CONSOLE) += serial_sh.o obj-$(CONFIG_SEMIHOSTING_SERIAL) += serial_semihosting.o obj-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o -obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o obj-$(CONFIG_ARC_SERIAL) += serial_arc.o obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index a08678dde4e..7b381ca12a0 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -191,7 +191,8 @@ int serial_init(void) { #if CONFIG_IS_ENABLED(SERIAL_PRESENT) serial_find_console_or_panic(); - gd->flags |= GD_FLG_SERIAL_READY; + if (gd->cur_serial_dev) + gd->flags |= GD_FLG_SERIAL_READY; if (IS_ENABLED(CONFIG_OF_SERIAL_BAUD)) { int ret = 0; diff --git a/drivers/serial/serial_linflexuart.c b/drivers/serial/serial_linflexuart.c deleted file mode 100644 index 24ecb236d51..00000000000 --- a/drivers/serial/serial_linflexuart.c +++ /dev/null @@ -1,216 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2013-2016 Freescale Semiconductor, Inc. - */ - -#include <dm.h> -#include <errno.h> -#include <watchdog.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <serial.h> -#include <linux/compiler.h> -#include <asm/arch/imx-regs.h> -#include <asm/arch/clock.h> - -#define US1_TDRE (1 << 7) -#define US1_RDRF (1 << 5) -#define UC2_TE (1 << 3) -#define LINCR1_INIT (1 << 0) -#define LINCR1_MME (1 << 4) -#define LINCR1_BF (1 << 7) -#define LINSR_LINS_INITMODE (0x00001000) -#define LINSR_LINS_MASK (0x0000F000) -#define UARTCR_UART (1 << 0) -#define UARTCR_WL0 (1 << 1) -#define UARTCR_PCE (1 << 2) -#define UARTCR_PC0 (1 << 3) -#define UARTCR_TXEN (1 << 4) -#define UARTCR_RXEN (1 << 5) -#define UARTCR_PC1 (1 << 6) -#define UARTSR_DTF (1 << 1) -#define UARTSR_DRF (1 << 2) -#define UARTSR_RMB (1 << 9) - -DECLARE_GLOBAL_DATA_PTR; - -static void _linflex_serial_setbrg(struct linflex_fsl *base, int baudrate) -{ - u32 clk = mxc_get_clock(MXC_UART_CLK); - u32 ibr, fbr; - - if (!baudrate) - baudrate = CONFIG_BAUDRATE; - - ibr = (u32) (clk / (16 * gd->baudrate)); - fbr = (u32) (clk % (16 * gd->baudrate)) * 16; - - __raw_writel(ibr, &base->linibrr); - __raw_writel(fbr, &base->linfbrr); -} - -static int _linflex_serial_getc(struct linflex_fsl *base) -{ - char c; - - if (!(__raw_readb(&base->uartsr) & UARTSR_DRF)) - return -EAGAIN; - - if (!(__raw_readl(&base->uartsr) & UARTSR_RMB)) - return -EAGAIN; - - c = __raw_readl(&base->bdrm); - __raw_writeb((__raw_readb(&base->uartsr) | (UARTSR_DRF | UARTSR_RMB)), - &base->uartsr); - return c; -} - -static int _linflex_serial_putc(struct linflex_fsl *base, const char c) -{ - __raw_writeb(c, &base->bdrl); - - if (!(__raw_readb(&base->uartsr) & UARTSR_DTF)) - return -EAGAIN; - - __raw_writeb((__raw_readb(&base->uartsr) | UARTSR_DTF), &base->uartsr); - - return 0; -} - -/* - * Initialise the serial port with the given baudrate. The settings - * are always 8 data bits, no parity, 1 stop bit, no start bits. - */ -static int _linflex_serial_init(struct linflex_fsl *base) -{ - volatile u32 ctrl; - - /* set the Linflex in master mode amd activate by-pass filter */ - ctrl = LINCR1_BF | LINCR1_MME; - __raw_writel(ctrl, &base->lincr1); - - /* init mode */ - ctrl |= LINCR1_INIT; - __raw_writel(ctrl, &base->lincr1); - - /* waiting for init mode entry - TODO: add a timeout */ - while ((__raw_readl(&base->linsr) & LINSR_LINS_MASK) != - LINSR_LINS_INITMODE); - - /* set UART bit to allow writing other bits */ - __raw_writel(UARTCR_UART, &base->uartcr); - - /* provide data bits, parity, stop bit, etc */ - serial_setbrg(); - - /* 8 bit data, no parity, Tx and Rx enabled, UART mode */ - __raw_writel(UARTCR_PC1 | UARTCR_RXEN | UARTCR_TXEN | UARTCR_PC0 - | UARTCR_WL0 | UARTCR_UART, &base->uartcr); - - ctrl = __raw_readl(&base->lincr1); - ctrl &= ~LINCR1_INIT; - __raw_writel(ctrl, &base->lincr1); /* end init mode */ - - return 0; -} - -struct linflex_serial_plat { - struct linflex_fsl *base_addr; - u8 port_id; /* do we need this? */ -}; - -struct linflex_serial_priv { - struct linflex_fsl *lfuart; -}; - -int linflex_serial_setbrg(struct udevice *dev, int baudrate) -{ - struct linflex_serial_priv *priv = dev_get_priv(dev); - - _linflex_serial_setbrg(priv->lfuart, baudrate); - - return 0; -} - -static int linflex_serial_getc(struct udevice *dev) -{ - struct linflex_serial_priv *priv = dev_get_priv(dev); - - return _linflex_serial_getc(priv->lfuart); -} - -static int linflex_serial_putc(struct udevice *dev, const char ch) -{ - - struct linflex_serial_priv *priv = dev_get_priv(dev); - - return _linflex_serial_putc(priv->lfuart, ch); -} - -static int linflex_serial_pending(struct udevice *dev, bool input) -{ - struct linflex_serial_priv *priv = dev_get_priv(dev); - uint32_t uartsr = __raw_readl(&priv->lfuart->uartsr); - - if (input) - return ((uartsr & UARTSR_DRF) && (uartsr & UARTSR_RMB)) ? 1 : 0; - else - return uartsr & UARTSR_DTF ? 0 : 1; -} - -static void linflex_serial_init_internal(struct linflex_fsl *lfuart) -{ - _linflex_serial_init(lfuart); - _linflex_serial_setbrg(lfuart, CONFIG_BAUDRATE); - return; -} - -static int linflex_serial_probe(struct udevice *dev) -{ - struct linflex_serial_plat *plat = dev_get_plat(dev); - struct linflex_serial_priv *priv = dev_get_priv(dev); - - priv->lfuart = (struct linflex_fsl *)plat->base_addr; - linflex_serial_init_internal(priv->lfuart); - - return 0; -} - -static const struct dm_serial_ops linflex_serial_ops = { - .putc = linflex_serial_putc, - .pending = linflex_serial_pending, - .getc = linflex_serial_getc, - .setbrg = linflex_serial_setbrg, -}; - -U_BOOT_DRIVER(serial_linflex) = { - .name = "serial_linflex", - .id = UCLASS_SERIAL, - .probe = linflex_serial_probe, - .ops = &linflex_serial_ops, - .flags = DM_FLAG_PRE_RELOC, - .priv_auto = sizeof(struct linflex_serial_priv), -}; - -#ifdef CONFIG_DEBUG_UART_LINFLEXUART - -#include <debug_uart.h> - -static inline void _debug_uart_init(void) -{ - struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_VAL(DEBUG_UART_BASE); - - linflex_serial_init_internal(base); -} - -static inline void _debug_uart_putc(int ch) -{ - struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_VAL(DEBUG_UART_BASE); - - /* XXX: Is this OK? Should this use the non-DM version? */ - _linflex_serial_putc(base, ch); -} - -DEBUG_UART_FUNCS - -#endif /* CONFIG_DEBUG_UART_LINFLEXUART */ diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index 93602797b83..9fdb6503085 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -129,7 +129,7 @@ static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk_rate) rate = clk_get_rate(&clk); if ((long)rate <= 0) { dev_err(dev, "Failed to get clk rate: %ld\n", (long)rate); - return ret; + return rate; } *clk_rate = rate; return 0; diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c index eb234108746..6bfd0e085e8 100644 --- a/drivers/serial/serial_xuartlite.c +++ b/drivers/serial/serial_xuartlite.c @@ -32,6 +32,14 @@ struct uartlite { }; struct uartlite_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_serial_uartlite dtplat; +#else + struct uartlite *regs; +#endif +}; + +struct uartlite_priv { struct uartlite *regs; }; @@ -53,8 +61,8 @@ static void uart_out32(void __iomem *addr, u32 val) static int uartlite_serial_putc(struct udevice *dev, const char ch) { - struct uartlite_plat *plat = dev_get_plat(dev); - struct uartlite *regs = plat->regs; + struct uartlite_priv *priv = dev_get_priv(dev); + struct uartlite *regs = priv->regs; if (uart_in32(®s->status) & SR_TX_FIFO_FULL) return -EAGAIN; @@ -66,8 +74,8 @@ static int uartlite_serial_putc(struct udevice *dev, const char ch) static int uartlite_serial_getc(struct udevice *dev) { - struct uartlite_plat *plat = dev_get_plat(dev); - struct uartlite *regs = plat->regs; + struct uartlite_priv *priv = dev_get_priv(dev); + struct uartlite *regs = priv->regs; if (!(uart_in32(®s->status) & SR_RX_FIFO_VALID_DATA)) return -EAGAIN; @@ -77,8 +85,8 @@ static int uartlite_serial_getc(struct udevice *dev) static int uartlite_serial_pending(struct udevice *dev, bool input) { - struct uartlite_plat *plat = dev_get_plat(dev); - struct uartlite *regs = plat->regs; + struct uartlite_priv *priv = dev_get_priv(dev); + struct uartlite *regs = priv->regs; if (input) return uart_in32(®s->status) & SR_RX_FIFO_VALID_DATA; @@ -89,9 +97,19 @@ static int uartlite_serial_pending(struct udevice *dev, bool input) static int uartlite_serial_probe(struct udevice *dev) { struct uartlite_plat *plat = dev_get_plat(dev); - struct uartlite *regs = plat->regs; + struct uartlite_priv *priv = dev_get_priv(dev); + struct uartlite *regs; int ret; +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_serial_uartlite *dtplat = &plat->dtplat; + + regs = (struct uartlite *)dtplat->reg[0]; +#else + regs = plat->regs; +#endif + priv->regs = regs; + uart_out32(®s->control, 0); uart_out32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); ret = uart_in32(®s->status); @@ -105,6 +123,7 @@ static int uartlite_serial_probe(struct udevice *dev) return 0; } +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static int uartlite_serial_of_to_plat(struct udevice *dev) { struct uartlite_plat *plat = dev_get_plat(dev); @@ -113,6 +132,7 @@ static int uartlite_serial_of_to_plat(struct udevice *dev) return 0; } +#endif static const struct dm_serial_ops uartlite_serial_ops = { .putc = uartlite_serial_putc, @@ -130,12 +150,17 @@ U_BOOT_DRIVER(serial_uartlite) = { .name = "serial_uartlite", .id = UCLASS_SERIAL, .of_match = uartlite_serial_ids, +#if !CONFIG_IS_ENABLED(OF_PLATDATA) .of_to_plat = uartlite_serial_of_to_plat, +#endif + .priv_auto = sizeof(struct uartlite_priv), .plat_auto = sizeof(struct uartlite_plat), .probe = uartlite_serial_probe, .ops = &uartlite_serial_ops, }; +DM_DRIVER_ALIAS(serial_uartlite, xlnx_xps_uartlite_1_00_a) + #ifdef CONFIG_DEBUG_UART_UARTLITE #include <debug_uart.h> |