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-rw-r--r--drivers/bios_emulator/atibios.c2
-rw-r--r--drivers/bios_emulator/x86emu/ops2.c2
-rw-r--r--drivers/ddr/marvell/a38x/mv_ddr4_training_calibration.c13
-rw-r--r--drivers/spi/Kconfig2
-rw-r--r--drivers/usb/Kconfig1
-rw-r--r--drivers/watchdog/Kconfig1
-rw-r--r--drivers/watchdog/arm_smc_wdt.c17
-rw-r--r--drivers/watchdog/stm32mp_wdt.c33
-rw-r--r--drivers/watchdog/wdt-uclass.c9
9 files changed, 72 insertions, 8 deletions
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
index d544ffb5ffb..e992a1aa822 100644
--- a/drivers/bios_emulator/atibios.c
+++ b/drivers/bios_emulator/atibios.c
@@ -99,7 +99,7 @@ static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
regs->e.edi = buffer_adr;
info = buffer;
memset(info, '\0', sizeof(*info));
- strcpy(info->signature, "VBE2");
+ memcpy(info->signature, "VBE2", 4);
BE_int86(0x10, regs, regs);
if (regs->e.eax != 0x4f) {
debug("VESA_GET_INFO: error %x\n", regs->e.eax);
diff --git a/drivers/bios_emulator/x86emu/ops2.c b/drivers/bios_emulator/x86emu/ops2.c
index 1ff27b2af95..29a166f7fe9 100644
--- a/drivers/bios_emulator/x86emu/ops2.c
+++ b/drivers/bios_emulator/x86emu/ops2.c
@@ -66,7 +66,7 @@ void x86emuOp2_illegal_op(
END_OF_INSTR();
}
-#define xorl(a,b) ((a) && !(b)) || (!(a) && (b))
+#define xorl(a, b) (((a) && !(b)) || (!(a) && (b)))
/****************************************************************************
REMARKS:
diff --git a/drivers/ddr/marvell/a38x/mv_ddr4_training_calibration.c b/drivers/ddr/marvell/a38x/mv_ddr4_training_calibration.c
index 31b6209416b..84156a1e8ad 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr4_training_calibration.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr4_training_calibration.c
@@ -64,7 +64,7 @@ static u8 center_high_element_get(u8 dir, u8 pbs_element, u16 lambda, u8 pbs_max
static int mv_ddr4_centralization(u8 dev_num, u16 (*lambda)[MAX_BUS_NUM][BUS_WIDTH_IN_BITS], u8 (*copt)[MAX_BUS_NUM],
u8 (*pbs_result)[MAX_BUS_NUM][BUS_WIDTH_IN_BITS], u8 (*vw_size)[MAX_BUS_NUM],
u8 mode, u16 param0, u8 param1);
-static int mv_ddr4_dqs_reposition(u8 dir, u16 *lambda, u8 *pbs_result, char delta, u8 *copt, u8 *dqs_pbs);
+static int mv_ddr4_dqs_reposition(u8 dir, u16 *lambda, u8 *pbs_result, s8 delta, u8 *copt, u8 *dqs_pbs);
static int mv_ddr4_copt_get(u8 dir, u16 *lambda, u8 *vw_l, u8 *vw_h, u8 *pbs_result, u8 *copt);
static int mv_ddr4_center_of_mass_calc(u8 dev_num, u8 if_id, u8 subphy_num, u8 mode, u8 *vw_l, u8 *vw_h, u8 *vw_v,
u8 vw_num, u8 *v_opt, u8 *t_opt);
@@ -659,7 +659,7 @@ static int mv_ddr4_centralization(u8 dev_num, u16 (*lambda)[MAX_BUS_NUM][BUS_WID
} /* if_id */
/* restore cs enable value*/
- for (if_id = 0; if_id < MAX_INTERFACE_NUM - 1; if_id++) {
+ for (if_id = 0; if_id < MAX_INTERFACE_NUM; if_id++) {
VALIDATE_IF_ACTIVE(tm->if_act_mask, if_id);
status = ddr3_tip_if_write(dev_num, ACCESS_TYPE_UNICAST, if_id, DUAL_DUNIT_CFG_REG,
cs_ena_reg_val[if_id], MASK_ALL_BITS);
@@ -895,7 +895,7 @@ static int mv_ddr4_copt_get(u8 dir, u16 *lambda, u8 *vw_l, u8 *vw_h, u8 *pbs_res
* It provides with a solution for a single subphy (8 bits).
* The calling function is responsible for any additional pbs taps for dqs
*/
-static int mv_ddr4_dqs_reposition(u8 dir, u16 *lambda, u8 *pbs_result, char delta, u8 *copt, u8 *dqs_pbs)
+static int mv_ddr4_dqs_reposition(u8 dir, u16 *lambda, u8 *pbs_result, s8 delta, u8 *copt, u8 *dqs_pbs)
{
u8 dq_idx;
u32 pbs_max_val = 0;
@@ -952,7 +952,8 @@ static int mv_ddr4_center_of_mass_calc(u8 dev_num, u8 if_id, u8 subphy_num, u8 m
int t_opt_temp = 0, v_opt_temp = 0;
int vw_avg = 0, v_avg = 0;
int s0 = 0, s1 = 0, s2 = 0, slope = 1, r_sq = 0;
- u32 d_min = 10000, reg_val = 0;
+ u32 reg_val = 0;
+ int d_min = 10000;
int status;
/*
@@ -2189,7 +2190,7 @@ int mv_ddr4_dm_tuning(u32 cs, u16 (*pbs_tap_factor)[MAX_BUS_NUM][BUS_WIDTH_IN_BI
for (dq = 0; dq < BUS_WIDTH_IN_BITS; dq++) {
idx = dq + subphy * BUS_WIDTH_IN_BITS;
reg_val = new_dq_pbs[dq] - dq_pbs_diff;
- if (reg_val < 0) {
+ if (new_dq_pbs[dq] < dq_pbs_diff) {
DEBUG_DM_TUNING(DEBUG_LEVEL_ERROR,
("unexpected negative value found\n"));
return MV_FAIL;
@@ -2267,7 +2268,7 @@ int mv_ddr4_dm_tuning(u32 cs, u16 (*pbs_tap_factor)[MAX_BUS_NUM][BUS_WIDTH_IN_BI
idx = dq + subphy * BUS_WIDTH_IN_BITS;
pad = dq_map_table[idx];
reg_val = new_dq_pbs[dq] - dq_pbs_diff;
- if (reg_val < 0) {
+ if (new_dq_pbs[dq] < dq_pbs_diff) {
DEBUG_DM_TUNING(DEBUG_LEVEL_ERROR,
("unexpected negative value found\n"));
return MV_FAIL;
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index a3513f0a3ef..1ae36b5a348 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -351,6 +351,8 @@ config MTK_SPIM
config MVEBU_A3700_SPI
bool "Marvell Armada 3700 SPI driver"
+ depends on ARCH_MVEBU && ARM64
+ select CLK_MVEBU
select CLK_ARMADA_3720
help
Enable the Marvell Armada 3700 SPI driver. This driver can be
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 99c6649e417..daf2240ffd9 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -112,6 +112,7 @@ config USB_KEYBOARD
config USB_ONBOARD_HUB
bool "Onboard USB hub support"
depends on DM_USB
+ select DEVRES
---help---
Say Y here if you want to support discrete onboard USB hubs that
don't require an additional control bus for initialization, but
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index e9ea874d0e3..56290b32bd9 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -15,6 +15,7 @@ config WATCHDOG_AUTOSTART
bool "Automatically start watchdog timer"
depends on WDT
default n if ARCH_SUNXI
+ default n if ARCH_STM32MP
default y
help
Automatically start watchdog timer and start servicing it during
diff --git a/drivers/watchdog/arm_smc_wdt.c b/drivers/watchdog/arm_smc_wdt.c
index 0ea44445700..f6854aa9ac9 100644
--- a/drivers/watchdog/arm_smc_wdt.c
+++ b/drivers/watchdog/arm_smc_wdt.c
@@ -46,6 +46,8 @@ static int smcwd_call(struct udevice *dev, enum smcwd_call call,
return -ENODEV;
if (res->a0 == PSCI_RET_INVALID_PARAMS)
return -EINVAL;
+ if (res->a0 == PSCI_RET_DISABLED)
+ return -ENODATA;
if (res->a0 != PSCI_RET_SUCCESS)
return -EIO;
@@ -99,6 +101,21 @@ static int smcwd_probe(struct udevice *dev)
priv->min_timeout = res.a1;
priv->max_timeout = res.a2;
+ /* If already started, then force u-boot to use it */
+ err = smcwd_call(dev, SMCWD_GET_TIMELEFT, 0, NULL);
+ switch (err) {
+ case 0:
+ dev_dbg(dev, "Already started\n");
+ wdt_set_force_autostart(dev);
+ break;
+ case -ENODATA:
+ dev_dbg(dev, "Not already started\n");
+ break;
+ default:
+ /* Optional SMCWD_GET_TIMELEFT not implemented */
+ break;
+ }
+
return 0;
}
diff --git a/drivers/watchdog/stm32mp_wdt.c b/drivers/watchdog/stm32mp_wdt.c
index 97ab8cfe7ab..0712524b4a8 100644
--- a/drivers/watchdog/stm32mp_wdt.c
+++ b/drivers/watchdog/stm32mp_wdt.c
@@ -21,11 +21,13 @@
#define IWDG_PR 0x04 /* Prescaler Register */
#define IWDG_RLR 0x08 /* ReLoad Register */
#define IWDG_SR 0x0C /* Status Register */
+#define IWDG_VERR 0x3F4 /* Version Register */
/* IWDG_KR register bit mask */
#define KR_KEY_RELOAD 0xAAAA /* Reload counter enable */
#define KR_KEY_ENABLE 0xCCCC /* Peripheral enable */
#define KR_KEY_EWA 0x5555 /* Write access enable */
+#define KR_KEY_DWA 0x0000 /* Write access disable*/
/* IWDG_PR register bit values */
#define PR_256 0x06 /* Prescaler set to 256 */
@@ -36,10 +38,17 @@
/* IWDG_SR register bit values */
#define SR_PVU BIT(0) /* Watchdog prescaler value update */
#define SR_RVU BIT(1) /* Watchdog counter reload value update */
+#define SR_ONF BIT(8) /* Watchdog enable status bit */
+
+/* IWDG Compatibility */
+#define ONF_MIN_VER 0x31
+
+#define TIMEOUT_US 10000
struct stm32mp_wdt_priv {
fdt_addr_t base; /* registers addr in physical memory */
unsigned long wdt_clk_rate; /* Watchdog dedicated clock rate */
+ unsigned int hw_version; /* Peripheral version */
};
static int stm32mp_wdt_reset(struct udevice *dev)
@@ -90,6 +99,7 @@ static int stm32mp_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
static int stm32mp_wdt_probe(struct udevice *dev)
{
struct stm32mp_wdt_priv *priv = dev_get_priv(dev);
+ u32 rlr, sr;
struct clk clk;
int ret;
@@ -115,6 +125,29 @@ static int stm32mp_wdt_probe(struct udevice *dev)
priv->wdt_clk_rate = clk_get_rate(&clk);
+ priv->hw_version = readl(priv->base + IWDG_VERR);
+
+ if (priv->hw_version >= ONF_MIN_VER) {
+ if (readl(priv->base + IWDG_SR) & SR_ONF)
+ wdt_set_force_autostart(dev);
+ } else {
+ /*
+ * Workaround for old versions without IWDG_SR_ONF bit:
+ * - write in IWDG_RLR_OFFSET
+ * - wait for sync
+ * - if sync succeeds, then iwdg is running
+ */
+ writel(KR_KEY_EWA, priv->base + IWDG_KR);
+ rlr = readl(priv->base + IWDG_RLR);
+ writel(rlr, priv->base + IWDG_RLR);
+ ret = readl_poll_timeout(priv->base + IWDG_SR, sr, sr & SR_RVU,
+ TIMEOUT_US);
+ if (!ret)
+ wdt_set_force_autostart(dev);
+
+ writel(KR_KEY_DWA, priv->base + IWDG_KR);
+ }
+
dev_dbg(dev, "IWDG init done\n");
return 0;
diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c
index 10be334e9ed..b32590069d9 100644
--- a/drivers/watchdog/wdt-uclass.c
+++ b/drivers/watchdog/wdt-uclass.c
@@ -46,6 +46,15 @@ struct wdt_priv {
struct cyclic_info cyclic;
};
+int wdt_set_force_autostart(struct udevice *dev)
+{
+ struct wdt_priv *priv = dev_get_uclass_priv(dev);
+
+ priv->autostart = true;
+
+ return 0;
+}
+
static void wdt_cyclic(struct cyclic_info *c)
{
struct wdt_priv *priv = container_of(c, struct wdt_priv, cyclic);
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-31 03:12:45 +0000