diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 17 | ||||
-rw-r--r-- | drivers/ddr/fsl/mpc85xx_ddr_gen1.c | 2 | ||||
-rw-r--r-- | drivers/dma/fsl_dma.c | 4 |
3 files changed, 5 insertions, 18 deletions
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index df7ec484651..759921bc582 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -938,7 +938,7 @@ static void set_ddr_sdram_cfg_2(const unsigned int ctrl_num, #if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) /* Use the DDR controller to auto initialize memory. */ d_init = popts->ecc_init_using_memctl; - ddr->ddr_data_init = CONFIG_MEM_INIT_VALUE; + ddr->ddr_data_init = 0xDEADBEEF; debug("DDR: ddr_data_init = 0x%08x\n", ddr->ddr_data_init); #else /* Memory will be initialized via DMA, or not at all. */ @@ -1842,19 +1842,6 @@ static void set_ddr_sdram_mode(const unsigned int ctrl_num, } #endif -/* DDR SDRAM Data Initialization (DDR_DATA_INIT) */ -static void set_ddr_data_init(fsl_ddr_cfg_regs_t *ddr) -{ - unsigned int init_value; /* Initialization value */ - -#ifdef CONFIG_MEM_INIT_VALUE - init_value = CONFIG_MEM_INIT_VALUE; -#else - init_value = 0xDEADBEEF; -#endif - ddr->ddr_data_init = init_value; -} - /* * DDR SDRAM Clock Control (DDR_SDRAM_CLK_CNTL) * The old controller on the 8540/60 doesn't have this register. @@ -2537,7 +2524,7 @@ compute_fsl_memctl_config_regs(const unsigned int ctrl_num, set_ddr_sdram_rcw(ctrl_num, ddr, popts, common_dimm); set_ddr_sdram_interval(ctrl_num, ddr, popts, common_dimm); - set_ddr_data_init(ddr); + ddr->ddr_data_init = 0xDEADBEEF; set_ddr_sdram_clk_cntl(ddr, popts); set_ddr_init_addr(ddr); set_ddr_init_ext_addr(ddr); diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c index 0f1e99eeb03..16186bdbae7 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c @@ -73,7 +73,7 @@ ddr_enable_ecc(unsigned int dram_size) struct ccsr_ddr __iomem *ddr = (struct ccsr_ddr __iomem *)(CFG_SYS_FSL_DDR_ADDR); - dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size); + dma_meminit(dram_size); /* * Enable errors for ECC. diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c index cd78e45d888..700df2236bd 100644 --- a/drivers/dma/fsl_dma.c +++ b/drivers/dma/fsl_dma.c @@ -133,7 +133,7 @@ int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t count) { */ #if ((!defined CONFIG_MPC83xx && defined(CONFIG_DDR_ECC) && \ !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))) -void dma_meminit(uint val, uint size) +void dma_meminit(uint size) { uint *p = 0; uint i = 0; @@ -142,7 +142,7 @@ void dma_meminit(uint val, uint size) if (((uint)p & 0x1f) == 0) ppcDcbz((ulong)p); - *p = (uint)CONFIG_MEM_INIT_VALUE; + *p = (uint)0xDEADBEEF; if (((uint)p & 0x1c) == 0x1c) ppcDcbf((ulong)p); |