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-rw-r--r--drivers/net/designware.c18
-rw-r--r--drivers/net/phy/miiphybb.c178
-rw-r--r--drivers/net/ravb.c16
-rw-r--r--drivers/net/sh_eth.c16
4 files changed, 122 insertions, 106 deletions
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 5a6e89c0575..045bff476d1 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -290,6 +290,15 @@ static int dw_eth_bb_delay(struct bb_miiphy_bus *bus)
return 0;
}
+static const struct bb_miiphy_bus_ops dw_eth_bb_miiphy_bus_ops = {
+ .mdio_active = dw_eth_bb_mdio_active,
+ .mdio_tristate = dw_eth_bb_mdio_tristate,
+ .set_mdio = dw_eth_bb_set_mdio,
+ .get_mdio = dw_eth_bb_get_mdio,
+ .set_mdc = dw_eth_bb_set_mdc,
+ .delay = dw_eth_bb_delay,
+};
+
static int dw_bb_mdio_init(const char *name, struct udevice *dev)
{
struct dw_eth_dev *dwpriv = dev_get_priv(dev);
@@ -330,16 +339,9 @@ static int dw_bb_mdio_init(const char *name, struct udevice *dev)
#if CONFIG_IS_ENABLED(DM_GPIO)
bus->reset = dw_mdio_reset;
#endif
+ bus->ops = &dw_eth_bb_miiphy_bus_ops;
bus->priv = dwpriv;
- /* Copy the bus accessors and private data */
- bb_miiphy->mdio_active = dw_eth_bb_mdio_active;
- bb_miiphy->mdio_tristate = dw_eth_bb_mdio_tristate;
- bb_miiphy->set_mdio = dw_eth_bb_set_mdio;
- bb_miiphy->get_mdio = dw_eth_bb_get_mdio;
- bb_miiphy->set_mdc = dw_eth_bb_set_mdc;
- bb_miiphy->delay = dw_eth_bb_delay;
-
return mdio_register(bus);
}
#endif
diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c
index 553af2c1032..e6106341eb3 100644
--- a/drivers/net/phy/miiphybb.c
+++ b/drivers/net/phy/miiphybb.c
@@ -46,8 +46,8 @@ void bb_miiphy_free(struct bb_miiphy_bus *bus)
* Utility to send the preamble, address, and register (common to read
* and write).
*/
-static void miiphy_pre(struct bb_miiphy_bus *bus, char read,
- unsigned char addr, unsigned char reg)
+static void miiphy_pre(struct bb_miiphy_bus *bus, const struct bb_miiphy_bus_ops *ops,
+ char read, unsigned char addr, unsigned char reg)
{
int j;
@@ -59,62 +59,62 @@ static void miiphy_pre(struct bb_miiphy_bus *bus, char read,
* but it is safer and will be much more robust.
*/
- bus->mdio_active(bus);
- bus->set_mdio(bus, 1);
+ ops->mdio_active(bus);
+ ops->set_mdio(bus, 1);
for (j = 0; j < 32; j++) {
- bus->set_mdc(bus, 0);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
}
/* send the start bit (01) and the read opcode (10) or write (10) */
- bus->set_mdc(bus, 0);
- bus->set_mdio(bus, 0);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
- bus->set_mdc(bus, 0);
- bus->set_mdio(bus, 1);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
- bus->set_mdc(bus, 0);
- bus->set_mdio(bus, read);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
- bus->set_mdc(bus, 0);
- bus->set_mdio(bus, !read);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->set_mdio(bus, 0);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->set_mdio(bus, 1);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->set_mdio(bus, read);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->set_mdio(bus, !read);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
/* send the PHY address */
for (j = 0; j < 5; j++) {
- bus->set_mdc(bus, 0);
+ ops->set_mdc(bus, 0);
if ((addr & 0x10) == 0) {
- bus->set_mdio(bus, 0);
+ ops->set_mdio(bus, 0);
} else {
- bus->set_mdio(bus, 1);
+ ops->set_mdio(bus, 1);
}
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
addr <<= 1;
}
/* send the register address */
for (j = 0; j < 5; j++) {
- bus->set_mdc(bus, 0);
+ ops->set_mdc(bus, 0);
if ((reg & 0x10) == 0) {
- bus->set_mdio(bus, 0);
+ ops->set_mdio(bus, 0);
} else {
- bus->set_mdio(bus, 1);
+ ops->set_mdio(bus, 1);
}
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
reg <<= 1;
}
}
@@ -132,56 +132,59 @@ int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg)
int v;
int j; /* counter */
struct bb_miiphy_bus *bus;
+ const struct bb_miiphy_bus_ops *ops;
bus = bb_miiphy_getbus(miidev);
if (bus == NULL) {
return -1;
}
- miiphy_pre (bus, 1, addr, reg);
+ ops = bus->ops;
+
+ miiphy_pre(bus, ops, 1, addr, reg);
/* tri-state our MDIO I/O pin so we can read */
- bus->set_mdc(bus, 0);
- bus->mdio_tristate(bus);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->mdio_tristate(bus);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
/* check the turnaround bit: the PHY should be driving it to zero */
- bus->get_mdio(bus, &v);
+ ops->get_mdio(bus, &v);
if (v != 0) {
/* puts ("PHY didn't drive TA low\n"); */
for (j = 0; j < 32; j++) {
- bus->set_mdc(bus, 0);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
}
/* There is no PHY, return */
return -1;
}
- bus->set_mdc(bus, 0);
- bus->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->delay(bus);
/* read 16 bits of register data, MSB first */
rdreg = 0;
for (j = 0; j < 16; j++) {
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
rdreg <<= 1;
- bus->get_mdio(bus, &v);
+ ops->get_mdio(bus, &v);
rdreg |= (v & 0x1);
- bus->set_mdc(bus, 0);
- bus->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->delay(bus);
}
- bus->set_mdc(bus, 1);
- bus->delay(bus);
- bus->set_mdc(bus, 0);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
debug("%s[%s](0x%x) @ 0x%x = 0x%04x\n", __func__, miidev->name, reg, addr, rdreg);
@@ -199,6 +202,7 @@ int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,
u16 value)
{
struct bb_miiphy_bus *bus;
+ const struct bb_miiphy_bus_ops *ops;
int j; /* counter */
bus = bb_miiphy_getbus(miidev);
@@ -207,42 +211,44 @@ int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,
return -1;
}
- miiphy_pre (bus, 0, addr, reg);
+ ops = bus->ops;
+
+ miiphy_pre(bus, ops, 0, addr, reg);
/* send the turnaround (10) */
- bus->set_mdc(bus, 0);
- bus->set_mdio(bus, 1);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
- bus->set_mdc(bus, 0);
- bus->set_mdio(bus, 0);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->set_mdio(bus, 1);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
+ ops->set_mdc(bus, 0);
+ ops->set_mdio(bus, 0);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
/* write 16 bits of register data, MSB first */
for (j = 0; j < 16; j++) {
- bus->set_mdc(bus, 0);
+ ops->set_mdc(bus, 0);
if ((value & 0x00008000) == 0) {
- bus->set_mdio(bus, 0);
+ ops->set_mdio(bus, 0);
} else {
- bus->set_mdio(bus, 1);
+ ops->set_mdio(bus, 1);
}
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
value <<= 1;
}
/*
* Tri-state the MDIO line.
*/
- bus->mdio_tristate(bus);
- bus->set_mdc(bus, 0);
- bus->delay(bus);
- bus->set_mdc(bus, 1);
- bus->delay(bus);
+ ops->mdio_tristate(bus);
+ ops->set_mdc(bus, 0);
+ ops->delay(bus);
+ ops->set_mdc(bus, 1);
+ ops->delay(bus);
return 0;
}
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index cb727ae9bc1..bd4900270a2 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -549,6 +549,15 @@ static int ravb_bb_delay(struct bb_miiphy_bus *bus)
return 0;
}
+static const struct bb_miiphy_bus_ops ravb_bb_miiphy_bus_ops = {
+ .mdio_active = ravb_bb_mdio_active,
+ .mdio_tristate = ravb_bb_mdio_tristate,
+ .set_mdio = ravb_bb_set_mdio,
+ .get_mdio = ravb_bb_get_mdio,
+ .set_mdc = ravb_bb_set_mdc,
+ .delay = ravb_bb_delay,
+};
+
static int ravb_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
@@ -578,12 +587,7 @@ static int ravb_probe(struct udevice *dev)
snprintf(mdiodev->name, sizeof(mdiodev->name), dev->name);
/* Copy the bus accessors and private data */
- bb_miiphy->mdio_active = ravb_bb_mdio_active;
- bb_miiphy->mdio_tristate = ravb_bb_mdio_tristate;
- bb_miiphy->set_mdio = ravb_bb_set_mdio;
- bb_miiphy->get_mdio = ravb_bb_get_mdio;
- bb_miiphy->set_mdc = ravb_bb_set_mdc;
- bb_miiphy->delay = ravb_bb_delay;
+ bb_miiphy->ops = &ravb_bb_miiphy_bus_ops;
bb_miiphy->priv = eth;
ret = mdio_register(mdiodev);
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 83e48609224..0693c240fbd 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -711,6 +711,15 @@ static int sh_eth_bb_delay(struct bb_miiphy_bus *bus)
return 0;
}
+static const struct bb_miiphy_bus_ops sh_ether_bb_miiphy_bus_ops = {
+ .mdio_active = sh_eth_bb_mdio_active,
+ .mdio_tristate = sh_eth_bb_mdio_tristate,
+ .set_mdio = sh_eth_bb_set_mdio,
+ .get_mdio = sh_eth_bb_get_mdio,
+ .set_mdc = sh_eth_bb_set_mdc,
+ .delay = sh_eth_bb_delay,
+};
+
static int sh_ether_probe(struct udevice *udev)
{
struct eth_pdata *pdata = dev_get_plat(udev);
@@ -740,12 +749,7 @@ static int sh_ether_probe(struct udevice *udev)
snprintf(mdiodev->name, sizeof(mdiodev->name), udev->name);
/* Copy the bus accessors and private data */
- bb_miiphy->mdio_active = sh_eth_bb_mdio_active;
- bb_miiphy->mdio_tristate = sh_eth_bb_mdio_tristate;
- bb_miiphy->set_mdio = sh_eth_bb_set_mdio;
- bb_miiphy->get_mdio = sh_eth_bb_get_mdio;
- bb_miiphy->set_mdc = sh_eth_bb_set_mdc;
- bb_miiphy->delay = sh_eth_bb_delay;
+ bb_miiphy->ops = &sh_ether_bb_miiphy_bus_ops;
bb_miiphy->priv = eth;
ret = mdio_register(mdiodev);
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-31 08:37:25 +0000