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-rw-r--r--drivers/mmc/renesas-sdhi.c32
-rw-r--r--drivers/pinctrl/renesas/pfc-r8a7790.c4
-rw-r--r--drivers/pinctrl/renesas/pfc-r8a7794.c4
-rw-r--r--drivers/spi/renesas_rpc_spi.c2
4 files changed, 21 insertions, 21 deletions
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 4b7cf773243..03e360ec1a2 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -886,29 +886,29 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* HS400 is not supported on H3 ES1.x, M3W ES1.[012], V3M, V3H ES1.x, D3 */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
- (rmobile_get_cpu_rev_integer() <= 1)) ||
+ (renesas_get_cpu_rev_integer() <= 1)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() <= 2)) ||
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() <= 2)) ||
(renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77980) &&
- (rmobile_get_cpu_rev_integer() <= 1)) ||
+ (renesas_get_cpu_rev_integer() <= 1)) ||
(renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
plat->cfg.host_caps &= ~MMC_MODE_HS400;
/* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
- (rmobile_get_cpu_rev_integer() >= 2)) ||
+ (renesas_get_cpu_rev_integer() >= 2)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() == 2)) ||
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() == 2)) ||
(renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965))
priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7);
/* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */
if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() > 2)) {
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() > 2)) {
priv->adjust_hs400_enable = true;
priv->adjust_hs400_offset = 3;
priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
@@ -918,7 +918,7 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* M3W+ bad taps */
if ((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 3))
+ (renesas_get_cpu_rev_integer() == 3))
priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
/* M3N can use HS400 with manual adjustment */
@@ -939,20 +939,20 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
/* H3 ES1.x, ES2.0 and M3W ES1.[0123] uses 4 tuning taps */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
- (rmobile_get_cpu_rev_integer() <= 2)) ||
+ (renesas_get_cpu_rev_integer() <= 2)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() <= 3)))
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() <= 3)))
priv->nrtaps = 4;
else
priv->nrtaps = 8;
#endif
/* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */
if (((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
- (rmobile_get_cpu_rev_integer() <= 1)) ||
+ (renesas_get_cpu_rev_integer() <= 1)) ||
((renesas_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
- (rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() == 0)))
+ (renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() == 0)))
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD;
else
priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
diff --git a/drivers/pinctrl/renesas/pfc-r8a7790.c b/drivers/pinctrl/renesas/pfc-r8a7790.c
index e1811c4c908..acd6b01f497 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7790.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7790.c
@@ -6117,8 +6117,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
static int r8a7790_pinmux_soc_init(struct sh_pfc *pfc)
{
/* Initialize TDSEL on old revisions */
- if ((rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() == 0))
+ if ((renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() == 0))
sh_pfc_write(pfc, 0xe6060088, 0x00155554);
return 0;
diff --git a/drivers/pinctrl/renesas/pfc-r8a7794.c b/drivers/pinctrl/renesas/pfc-r8a7794.c
index 29eab2610c1..2f550218182 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7794.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7794.c
@@ -5818,8 +5818,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
static int r8a7794_pinmux_soc_init(struct sh_pfc *pfc)
{
/* Initialize TDSEL on old revisions */
- if ((rmobile_get_cpu_rev_integer() == 1) &&
- (rmobile_get_cpu_rev_fraction() == 0))
+ if ((renesas_get_cpu_rev_integer() == 1) &&
+ (renesas_get_cpu_rev_fraction() == 0))
sh_pfc_write(pfc, 0xe6060068, 0x55555500);
return 0;
diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c
index 8a93d1b1bfd..165c0a1351a 100644
--- a/drivers/spi/renesas_rpc_spi.c
+++ b/drivers/spi/renesas_rpc_spi.c
@@ -212,7 +212,7 @@ static u32 rpc_spi_get_strobe_delay(void)
* 7: On other R-Car Gen3
* 15: On R-Car Gen4
*/
- if (cpu_type == RMOBILE_CPU_TYPE_R8A7796 && rmobile_get_cpu_rev_integer() == 1)
+ if (cpu_type == RMOBILE_CPU_TYPE_R8A7796 && renesas_get_cpu_rev_integer() == 1)
return RPC_PHYCNT_STRTIM(6);
else if (cpu_type == RMOBILE_CPU_TYPE_R8A779F0 ||
cpu_type == RMOBILE_CPU_TYPE_R8A779G0 ||
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-25 11:03:09 +0000