diff options
Diffstat (limited to 'include/dt-bindings/clock/r8a77970-cpg-mssr.h')
| -rw-r--r-- | include/dt-bindings/clock/r8a77970-cpg-mssr.h | 44 |
1 files changed, 0 insertions, 44 deletions
diff --git a/include/dt-bindings/clock/r8a77970-cpg-mssr.h b/include/dt-bindings/clock/r8a77970-cpg-mssr.h deleted file mode 100644 index 6145ebe6636..00000000000 --- a/include/dt-bindings/clock/r8a77970-cpg-mssr.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ - * - * Copyright (C) 2016 Renesas Electronics Corp. - * Copyright (C) 2017 Cogent Embedded, Inc. - */ -#ifndef __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ -#define __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ - -#include <dt-bindings/clock/renesas-cpg-mssr.h> - -/* r8a77970 CPG Core Clocks */ -#define R8A77970_CLK_Z2 0 -#define R8A77970_CLK_ZR 1 -#define R8A77970_CLK_ZTR 2 -#define R8A77970_CLK_ZTRD2 3 -#define R8A77970_CLK_ZT 4 -#define R8A77970_CLK_ZX 5 -#define R8A77970_CLK_S1D1 6 -#define R8A77970_CLK_S1D2 7 -#define R8A77970_CLK_S1D4 8 -#define R8A77970_CLK_S2D1 9 -#define R8A77970_CLK_S2D2 10 -#define R8A77970_CLK_S2D4 11 -#define R8A77970_CLK_LB 12 -#define R8A77970_CLK_CL 13 -#define R8A77970_CLK_ZB3 14 -#define R8A77970_CLK_ZB3D2 15 -#define R8A77970_CLK_DDR 16 -#define R8A77970_CLK_CR 17 -#define R8A77970_CLK_CRD2 18 -#define R8A77970_CLK_SD0H 19 -#define R8A77970_CLK_SD0 20 -#define R8A77970_CLK_RPC 21 -#define R8A77970_CLK_RPCD2 22 -#define R8A77970_CLK_MSO 23 -#define R8A77970_CLK_CANFD 24 -#define R8A77970_CLK_CSI0 25 -#define R8A77970_CLK_FRAY 26 -#define R8A77970_CLK_CP 27 -#define R8A77970_CLK_CPEX 28 -#define R8A77970_CLK_R 29 -#define R8A77970_CLK_OSC 30 - -#endif /* __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ */ |