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-rw-r--r--include/dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h126
-rw-r--r--include/dt-bindings/interrupt-controller/apple-aic.h17
-rw-r--r--include/dt-bindings/interrupt-controller/arm-gic.h25
-rw-r--r--include/dt-bindings/interrupt-controller/aspeed-scu-ic.h23
-rw-r--r--include/dt-bindings/interrupt-controller/irq-st.h27
-rw-r--r--include/dt-bindings/interrupt-controller/irq.h20
-rw-r--r--include/dt-bindings/interrupt-controller/irqc-rzg2l.h25
-rw-r--r--include/dt-bindings/interrupt-controller/mips-gic.h10
-rw-r--r--include/dt-bindings/interrupt-controller/mvebu-icu.h16
-rw-r--r--include/dt-bindings/interrupt-controller/x86-irq.h14
10 files changed, 14 insertions, 289 deletions
diff --git a/include/dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h b/include/dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h
deleted file mode 100644
index bd415cb7b66..00000000000
--- a/include/dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
-/*
- * Copyright (c) 2023 Amlogic, Inc. All rights reserved.
- * Author: Huqiang Qin <huqiang.qin@amlogic.com>
- */
-
-#ifndef _DT_BINDINGS_IRQ_MESON_G12A_GPIO_H
-#define _DT_BINDINGS_IRQ_MESON_G12A_GPIO_H
-
-/* IRQID[11:0] - GPIOAO[11:0] */
-#define IRQID_GPIOAO_0 0
-#define IRQID_GPIOAO_1 1
-#define IRQID_GPIOAO_2 2
-#define IRQID_GPIOAO_3 3
-#define IRQID_GPIOAO_4 4
-#define IRQID_GPIOAO_5 5
-#define IRQID_GPIOAO_6 6
-#define IRQID_GPIOAO_7 7
-#define IRQID_GPIOAO_8 8
-#define IRQID_GPIOAO_9 9
-#define IRQID_GPIOAO_10 10
-#define IRQID_GPIOAO_11 11
-
-/* IRQID[27:12] - GPIOZ[15:0] */
-#define IRQID_GPIOZ_0 12
-#define IRQID_GPIOZ_1 13
-#define IRQID_GPIOZ_2 14
-#define IRQID_GPIOZ_3 15
-#define IRQID_GPIOZ_4 16
-#define IRQID_GPIOZ_5 17
-#define IRQID_GPIOZ_6 18
-#define IRQID_GPIOZ_7 19
-#define IRQID_GPIOZ_8 20
-#define IRQID_GPIOZ_9 21
-#define IRQID_GPIOZ_10 22
-#define IRQID_GPIOZ_11 23
-#define IRQID_GPIOZ_12 24
-#define IRQID_GPIOZ_13 25
-#define IRQID_GPIOZ_14 26
-#define IRQID_GPIOZ_15 27
-
-/* IRQID[36:28] - GPIOH[8:0] */
-#define IRQID_GPIOH_0 28
-#define IRQID_GPIOH_1 29
-#define IRQID_GPIOH_2 30
-#define IRQID_GPIOH_3 31
-#define IRQID_GPIOH_4 32
-#define IRQID_GPIOH_5 33
-#define IRQID_GPIOH_6 34
-#define IRQID_GPIOH_7 35
-#define IRQID_GPIOH_8 36
-
-/* IRQID[52:37] - BOOT[15:0] */
-#define IRQID_BOOT_0 37
-#define IRQID_BOOT_1 38
-#define IRQID_BOOT_2 39
-#define IRQID_BOOT_3 40
-#define IRQID_BOOT_4 41
-#define IRQID_BOOT_5 42
-#define IRQID_BOOT_6 43
-#define IRQID_BOOT_7 44
-#define IRQID_BOOT_8 45
-#define IRQID_BOOT_9 46
-#define IRQID_BOOT_10 47
-#define IRQID_BOOT_11 48
-#define IRQID_BOOT_12 49
-#define IRQID_BOOT_13 50
-#define IRQID_BOOT_14 51
-#define IRQID_BOOT_15 52
-
-/* IRQID[60:53] - GPIOC[7:0] */
-#define IRQID_GPIOC_0 53
-#define IRQID_GPIOC_1 54
-#define IRQID_GPIOC_2 55
-#define IRQID_GPIOC_3 56
-#define IRQID_GPIOC_4 57
-#define IRQID_GPIOC_5 58
-#define IRQID_GPIOC_6 59
-#define IRQID_GPIOC_7 60
-
-/* IRQID[76:61] - GPIOA[15:0] */
-#define IRQID_GPIOA_0 61
-#define IRQID_GPIOA_1 62
-#define IRQID_GPIOA_2 63
-#define IRQID_GPIOA_3 64
-#define IRQID_GPIOA_4 65
-#define IRQID_GPIOA_5 66
-#define IRQID_GPIOA_6 67
-#define IRQID_GPIOA_7 68
-#define IRQID_GPIOA_8 69
-#define IRQID_GPIOA_9 70
-#define IRQID_GPIOA_10 71
-#define IRQID_GPIOA_11 72
-#define IRQID_GPIOA_12 73
-#define IRQID_GPIOA_13 74
-#define IRQID_GPIOA_14 75
-#define IRQID_GPIOA_15 76
-
-/* IRQID[96:77] - GPIOX[19:0] */
-#define IRQID_GPIOX_0 77
-#define IRQID_GPIOX_1 78
-#define IRQID_GPIOX_2 79
-#define IRQID_GPIOX_3 80
-#define IRQID_GPIOX_4 81
-#define IRQID_GPIOX_5 82
-#define IRQID_GPIOX_6 83
-#define IRQID_GPIOX_7 84
-#define IRQID_GPIOX_8 85
-#define IRQID_GPIOX_9 86
-#define IRQID_GPIOX_10 87
-#define IRQID_GPIOX_11 88
-#define IRQID_GPIOX_12 89
-#define IRQID_GPIOX_13 90
-#define IRQID_GPIOX_14 91
-#define IRQID_GPIOX_15 92
-#define IRQID_GPIOX_16 93
-#define IRQID_GPIOX_17 94
-#define IRQID_GPIOX_18 95
-#define IRQID_GPIOX_19 96
-
-/* IRQID[99:97] - GPIOE[2:0] */
-#define IRQID_GPIOE_0 97
-#define IRQID_GPIOE_1 98
-#define IRQID_GPIOE_2 99
-
-#endif /* _DT_BINDINGS_IRQ_MESON_G12A_GPIO_H */
diff --git a/include/dt-bindings/interrupt-controller/apple-aic.h b/include/dt-bindings/interrupt-controller/apple-aic.h
deleted file mode 100644
index bf3aac0e549..00000000000
--- a/include/dt-bindings/interrupt-controller/apple-aic.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
-#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_APPLE_AIC_H
-#define _DT_BINDINGS_INTERRUPT_CONTROLLER_APPLE_AIC_H
-
-#include <dt-bindings/interrupt-controller/irq.h>
-
-#define AIC_IRQ 0
-#define AIC_FIQ 1
-
-#define AIC_TMR_HV_PHYS 0
-#define AIC_TMR_HV_VIRT 1
-#define AIC_TMR_GUEST_PHYS 2
-#define AIC_TMR_GUEST_VIRT 3
-#define AIC_CPU_PMU_E 4
-#define AIC_CPU_PMU_P 5
-
-#endif
diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/dt-bindings/interrupt-controller/arm-gic.h
deleted file mode 100644
index 887f53363e8..00000000000
--- a/include/dt-bindings/interrupt-controller/arm-gic.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR MIT */
-/*
- * This header provides constants for the ARM GIC.
- */
-
-#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
-#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
-
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/* interrupt specifier cell 0 */
-
-#define GIC_SPI 0
-#define GIC_PPI 1
-#define GIC_ESPI 2
-#define GIC_EPPI 3
-
-/*
- * Interrupt specifier cell 2.
- * The flags in irq.h are valid, plus those below.
- */
-#define GIC_CPU_MASK_RAW(x) ((x) << 8)
-#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
-
-#endif
diff --git a/include/dt-bindings/interrupt-controller/aspeed-scu-ic.h b/include/dt-bindings/interrupt-controller/aspeed-scu-ic.h
deleted file mode 100644
index f315d5a7f5e..00000000000
--- a/include/dt-bindings/interrupt-controller/aspeed-scu-ic.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-
-#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ASPEED_SCU_IC_H_
-#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ASPEED_SCU_IC_H_
-
-#define ASPEED_SCU_IC_VGA_CURSOR_CHANGE 0
-#define ASPEED_SCU_IC_VGA_SCRATCH_REG_CHANGE 1
-
-#define ASPEED_AST2500_SCU_IC_PCIE_RESET_LO_TO_HI 2
-#define ASPEED_AST2500_SCU_IC_PCIE_RESET_HI_TO_LO 3
-#define ASPEED_AST2500_SCU_IC_LPC_RESET_LO_TO_HI 4
-#define ASPEED_AST2500_SCU_IC_LPC_RESET_HI_TO_LO 5
-#define ASPEED_AST2500_SCU_IC_ISSUE_MSI 6
-
-#define ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI 2
-#define ASPEED_AST2600_SCU_IC0_PCIE_PERST_HI_TO_LO 3
-#define ASPEED_AST2600_SCU_IC0_PCIE_RCRST_LO_TO_HI 4
-#define ASPEED_AST2600_SCU_IC0_PCIE_RCRST_HI_TO_LO 5
-
-#define ASPEED_AST2600_SCU_IC1_LPC_RESET_LO_TO_HI 0
-#define ASPEED_AST2600_SCU_IC1_LPC_RESET_HI_TO_LO 1
-
-#endif /* _DT_BINDINGS_INTERRUPT_CONTROLLER_ASPEED_SCU_IC_H_ */
diff --git a/include/dt-bindings/interrupt-controller/irq-st.h b/include/dt-bindings/interrupt-controller/irq-st.h
deleted file mode 100644
index 9c9c8e2b808..00000000000
--- a/include/dt-bindings/interrupt-controller/irq-st.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * include/linux/irqchip/irq-st.h
- *
- * Copyright (C) 2014 STMicroelectronics – All Rights Reserved
- *
- * Author: Lee Jones <lee.jones@linaro.org>
- */
-
-#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ST_H
-#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ST_H
-
-#define ST_IRQ_SYSCFG_EXT_0 0
-#define ST_IRQ_SYSCFG_EXT_1 1
-#define ST_IRQ_SYSCFG_EXT_2 2
-#define ST_IRQ_SYSCFG_CTI_0 3
-#define ST_IRQ_SYSCFG_CTI_1 4
-#define ST_IRQ_SYSCFG_PMU_0 5
-#define ST_IRQ_SYSCFG_PMU_1 6
-#define ST_IRQ_SYSCFG_pl310_L2 7
-#define ST_IRQ_SYSCFG_DISABLED 0xFFFFFFFF
-
-#define ST_IRQ_SYSCFG_EXT_1_INV 0x1
-#define ST_IRQ_SYSCFG_EXT_2_INV 0x2
-#define ST_IRQ_SYSCFG_EXT_3_INV 0x4
-
-#endif
diff --git a/include/dt-bindings/interrupt-controller/irq.h b/include/dt-bindings/interrupt-controller/irq.h
deleted file mode 100644
index 9e3d183e138..00000000000
--- a/include/dt-bindings/interrupt-controller/irq.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR MIT */
-/*
- * This header provides constants for most IRQ bindings.
- *
- * Most IRQ bindings include a flags cell as part of the IRQ specifier.
- * In most cases, the format of the flags cell uses the standard values
- * defined in this header.
- */
-
-#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
-#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
-
-#define IRQ_TYPE_NONE 0
-#define IRQ_TYPE_EDGE_RISING 1
-#define IRQ_TYPE_EDGE_FALLING 2
-#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
-#define IRQ_TYPE_LEVEL_HIGH 4
-#define IRQ_TYPE_LEVEL_LOW 8
-
-#endif
diff --git a/include/dt-bindings/interrupt-controller/irqc-rzg2l.h b/include/dt-bindings/interrupt-controller/irqc-rzg2l.h
deleted file mode 100644
index 34ce778885a..00000000000
--- a/include/dt-bindings/interrupt-controller/irqc-rzg2l.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
-/*
- * This header provides constants for Renesas RZ/G2L family IRQC bindings.
- *
- * Copyright (C) 2022 Renesas Electronics Corp.
- *
- */
-
-#ifndef __DT_BINDINGS_IRQC_RZG2L_H
-#define __DT_BINDINGS_IRQC_RZG2L_H
-
-/* NMI maps to SPI0 */
-#define RZG2L_NMI 0
-
-/* IRQ0-7 map to SPI1-8 */
-#define RZG2L_IRQ0 1
-#define RZG2L_IRQ1 2
-#define RZG2L_IRQ2 3
-#define RZG2L_IRQ3 4
-#define RZG2L_IRQ4 5
-#define RZG2L_IRQ5 6
-#define RZG2L_IRQ6 7
-#define RZG2L_IRQ7 8
-
-#endif /* __DT_BINDINGS_IRQC_RZG2L_H */
diff --git a/include/dt-bindings/interrupt-controller/mips-gic.h b/include/dt-bindings/interrupt-controller/mips-gic.h
deleted file mode 100644
index bd45cee0c3f..00000000000
--- a/include/dt-bindings/interrupt-controller/mips-gic.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H
-#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H
-
-#include <dt-bindings/interrupt-controller/irq.h>
-
-#define GIC_SHARED 0
-#define GIC_LOCAL 1
-
-#endif
diff --git a/include/dt-bindings/interrupt-controller/mvebu-icu.h b/include/dt-bindings/interrupt-controller/mvebu-icu.h
deleted file mode 100644
index bb5217c6420..00000000000
--- a/include/dt-bindings/interrupt-controller/mvebu-icu.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for the MVEBU ICU driver.
- */
-
-#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_MVEBU_ICU_H
-#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MVEBU_ICU_H
-
-/* interrupt specifier cell 0 */
-
-#define ICU_GRP_NSR 0x0
-#define ICU_GRP_SR 0x1
-#define ICU_GRP_SEI 0x4
-#define ICU_GRP_REI 0x5
-
-#endif
diff --git a/include/dt-bindings/interrupt-controller/x86-irq.h b/include/dt-bindings/interrupt-controller/x86-irq.h
new file mode 100644
index 00000000000..9e0b4612e13
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/x86-irq.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2019 Google LLC
+ *
+ * This provides additional flags used by x86.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_X86_IRQ_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_X86_IRQ_H
+
+#define X86_IRQ_TYPE_SHARED (1 << 4)
+#define X86_IRQ_TYPE_WAKE (1 << 5)
+
+#endif