diff options
Diffstat (limited to 'include/dt-bindings/phy')
| -rw-r--r-- | include/dt-bindings/phy/nuvoton,npcm-usbphy.h | 14 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-am654-serdes.h | 13 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-cadence.h | 15 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-imx8-pcie.h | 14 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-lan966x-serdes.h | 14 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-lantiq-vrx200-pcie.h | 11 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-ocelot-serdes.h | 12 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-pistachio-usb.h | 13 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-qcom-qmp.h | 24 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-qcom-qusb2.h | 37 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy-ti.h | 21 | ||||
| -rw-r--r-- | include/dt-bindings/phy/phy.h | 27 |
12 files changed, 22 insertions, 193 deletions
diff --git a/include/dt-bindings/phy/nuvoton,npcm-usbphy.h b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h new file mode 100644 index 00000000000..46946d377d9 --- /dev/null +++ b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +// Copyright (c) 2023 Nuvoton Technology corporation. + +#ifndef _DT_BINDINGS_NPCM_USBPHY_H +#define _DT_BINDINGS_NPCM_USBPHY_H + +#define NPCM_UDC0_7 0 +#define NPCM_UDC8 1 +#define NPCM_UDC9 2 +#define NPCM_USBH1 3 +#define NPCM_USBH2 4 +#define NPCM_MAX_USB_CTRL_ID 4 + +#endif diff --git a/include/dt-bindings/phy/phy-am654-serdes.h b/include/dt-bindings/phy/phy-am654-serdes.h deleted file mode 100644 index e8d901729ed..00000000000 --- a/include/dt-bindings/phy/phy-am654-serdes.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides constants for AM654 SERDES. - */ - -#ifndef _DT_BINDINGS_AM654_SERDES -#define _DT_BINDINGS_AM654_SERDES - -#define AM654_SERDES_CMU_REFCLK 0 -#define AM654_SERDES_LO_REFCLK 1 -#define AM654_SERDES_RO_REFCLK 2 - -#endif /* _DT_BINDINGS_AM654_SERDES */ diff --git a/include/dt-bindings/phy/phy-cadence.h b/include/dt-bindings/phy/phy-cadence.h index 0671991208f..0122c6067b1 100644 --- a/include/dt-bindings/phy/phy-cadence.h +++ b/include/dt-bindings/phy/phy-cadence.h @@ -6,18 +6,19 @@ #ifndef _DT_BINDINGS_CADENCE_SERDES_H #define _DT_BINDINGS_CADENCE_SERDES_H -#define CDNS_SERDES_NO_SSC 0 -#define CDNS_SERDES_EXTERNAL_SSC 1 -#define CDNS_SERDES_INTERNAL_SSC 2 - /* Torrent */ +#define TORRENT_SERDES_NO_SSC 0 +#define TORRENT_SERDES_EXTERNAL_SSC 1 +#define TORRENT_SERDES_INTERNAL_SSC 2 + #define CDNS_TORRENT_REFCLK_DRIVER 0 -#define CDNS_TORRENT_DERIVED_REFCLK 1 -#define CDNS_TORRENT_RECEIVED_REFCLK 2 /* Sierra */ #define CDNS_SIERRA_PLL_CMNLC 0 #define CDNS_SIERRA_PLL_CMNLC1 1 -#define CDNS_SIERRA_DERIVED_REFCLK 2 + +#define SIERRA_SERDES_NO_SSC 0 +#define SIERRA_SERDES_EXTERNAL_SSC 1 +#define SIERRA_SERDES_INTERNAL_SSC 2 #endif /* _DT_BINDINGS_CADENCE_SERDES_H */ diff --git a/include/dt-bindings/phy/phy-imx8-pcie.h b/include/dt-bindings/phy/phy-imx8-pcie.h deleted file mode 100644 index 8bbe2d6538d..00000000000 --- a/include/dt-bindings/phy/phy-imx8-pcie.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/* - * This header provides constants for i.MX8 PCIe. - */ - -#ifndef _DT_BINDINGS_IMX8_PCIE_H -#define _DT_BINDINGS_IMX8_PCIE_H - -/* Reference clock PAD mode */ -#define IMX8_PCIE_REFCLK_PAD_UNUSED 0 -#define IMX8_PCIE_REFCLK_PAD_INPUT 1 -#define IMX8_PCIE_REFCLK_PAD_OUTPUT 2 - -#endif /* _DT_BINDINGS_IMX8_PCIE_H */ diff --git a/include/dt-bindings/phy/phy-lan966x-serdes.h b/include/dt-bindings/phy/phy-lan966x-serdes.h deleted file mode 100644 index 4330269a901..00000000000 --- a/include/dt-bindings/phy/phy-lan966x-serdes.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ - -#ifndef __PHY_LAN966X_SERDES_H__ -#define __PHY_LAN966X_SERDES_H__ - -#define CU(x) (x) -#define CU_MAX CU(2) -#define SERDES6G(x) (CU_MAX + 1 + (x)) -#define SERDES6G_MAX SERDES6G(3) -#define RGMII(x) (SERDES6G_MAX + 1 + (x)) -#define RGMII_MAX RGMII(2) -#define SERDES_MAX (RGMII_MAX + 1) - -#endif diff --git a/include/dt-bindings/phy/phy-lantiq-vrx200-pcie.h b/include/dt-bindings/phy/phy-lantiq-vrx200-pcie.h deleted file mode 100644 index 95a7896356d..00000000000 --- a/include/dt-bindings/phy/phy-lantiq-vrx200-pcie.h +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2019 Martin Blumenstingl <martin.blumenstingl@googlemail.com> - */ - -#define LANTIQ_PCIE_PHY_MODE_25MHZ 0 -#define LANTIQ_PCIE_PHY_MODE_25MHZ_SSC 1 -#define LANTIQ_PCIE_PHY_MODE_36MHZ 2 -#define LANTIQ_PCIE_PHY_MODE_36MHZ_SSC 3 -#define LANTIQ_PCIE_PHY_MODE_100MHZ 4 -#define LANTIQ_PCIE_PHY_MODE_100MHZ_SSC 5 diff --git a/include/dt-bindings/phy/phy-ocelot-serdes.h b/include/dt-bindings/phy/phy-ocelot-serdes.h deleted file mode 100644 index fe70adaca68..00000000000 --- a/include/dt-bindings/phy/phy-ocelot-serdes.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ -/* Copyright (c) 2018 Microsemi Corporation */ -#ifndef __PHY_OCELOT_SERDES_H__ -#define __PHY_OCELOT_SERDES_H__ - -#define SERDES1G(x) (x) -#define SERDES1G_MAX SERDES1G(5) -#define SERDES6G(x) (SERDES1G_MAX + 1 + (x)) -#define SERDES6G_MAX SERDES6G(2) -#define SERDES_MAX (SERDES6G_MAX + 1) - -#endif diff --git a/include/dt-bindings/phy/phy-pistachio-usb.h b/include/dt-bindings/phy/phy-pistachio-usb.h deleted file mode 100644 index 3542a67dafb..00000000000 --- a/include/dt-bindings/phy/phy-pistachio-usb.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2015 Google, Inc. - */ - -#ifndef _DT_BINDINGS_PHY_PISTACHIO -#define _DT_BINDINGS_PHY_PISTACHIO - -#define REFCLK_XO_CRYSTAL 0x0 -#define REFCLK_X0_EXT_CLK 0x1 -#define REFCLK_CLK_CORE 0x2 - -#endif /* _DT_BINDINGS_PHY_PISTACHIO */ diff --git a/include/dt-bindings/phy/phy-qcom-qmp.h b/include/dt-bindings/phy/phy-qcom-qmp.h deleted file mode 100644 index 6b43ea9e005..00000000000 --- a/include/dt-bindings/phy/phy-qcom-qmp.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ -/* - * Qualcomm QMP PHY constants - * - * Copyright (C) 2022 Linaro Limited - */ - -#ifndef _DT_BINDINGS_PHY_QMP -#define _DT_BINDINGS_PHY_QMP - -/* QMP USB4-USB3-DP clocks */ -#define QMP_USB43DP_USB3_PIPE_CLK 0 -#define QMP_USB43DP_DP_LINK_CLK 1 -#define QMP_USB43DP_DP_VCO_DIV_CLK 2 - -/* QMP USB4-USB3-DP PHYs */ -#define QMP_USB43DP_USB3_PHY 0 -#define QMP_USB43DP_DP_PHY 1 - -/* QMP PCIE PHYs */ -#define QMP_PCIE_PIPE_CLK 0 -#define QMP_PCIE_PHY_AUX_CLK 1 - -#endif /* _DT_BINDINGS_PHY_QMP */ diff --git a/include/dt-bindings/phy/phy-qcom-qusb2.h b/include/dt-bindings/phy/phy-qcom-qusb2.h deleted file mode 100644 index 5c5e4d800ca..00000000000 --- a/include/dt-bindings/phy/phy-qcom-qusb2.h +++ /dev/null @@ -1,37 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2018, The Linux Foundation. All rights reserved. - */ - -#ifndef _DT_BINDINGS_QCOM_PHY_QUSB2_H_ -#define _DT_BINDINGS_QCOM_PHY_QUSB2_H_ - -/* PHY HSTX TRIM bit values (24mA to 15mA) */ -#define QUSB2_V2_HSTX_TRIM_24_0_MA 0x0 -#define QUSB2_V2_HSTX_TRIM_23_4_MA 0x1 -#define QUSB2_V2_HSTX_TRIM_22_8_MA 0x2 -#define QUSB2_V2_HSTX_TRIM_22_2_MA 0x3 -#define QUSB2_V2_HSTX_TRIM_21_6_MA 0x4 -#define QUSB2_V2_HSTX_TRIM_21_0_MA 0x5 -#define QUSB2_V2_HSTX_TRIM_20_4_MA 0x6 -#define QUSB2_V2_HSTX_TRIM_19_8_MA 0x7 -#define QUSB2_V2_HSTX_TRIM_19_2_MA 0x8 -#define QUSB2_V2_HSTX_TRIM_18_6_MA 0x9 -#define QUSB2_V2_HSTX_TRIM_18_0_MA 0xa -#define QUSB2_V2_HSTX_TRIM_17_4_MA 0xb -#define QUSB2_V2_HSTX_TRIM_16_8_MA 0xc -#define QUSB2_V2_HSTX_TRIM_16_2_MA 0xd -#define QUSB2_V2_HSTX_TRIM_15_6_MA 0xe -#define QUSB2_V2_HSTX_TRIM_15_0_MA 0xf - -/* PHY PREEMPHASIS bit values */ -#define QUSB2_V2_PREEMPHASIS_NONE 0 -#define QUSB2_V2_PREEMPHASIS_5_PERCENT 1 -#define QUSB2_V2_PREEMPHASIS_10_PERCENT 2 -#define QUSB2_V2_PREEMPHASIS_15_PERCENT 3 - -/* PHY PREEMPHASIS-WIDTH bit values */ -#define QUSB2_V2_PREEMPHASIS_WIDTH_FULL_BIT 0 -#define QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT 1 - -#endif diff --git a/include/dt-bindings/phy/phy-ti.h b/include/dt-bindings/phy/phy-ti.h deleted file mode 100644 index ad955d3a56b..00000000000 --- a/include/dt-bindings/phy/phy-ti.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * This header provides constants for TI SERDES. - */ - -#ifndef _DT_BINDINGS_TI_SERDES -#define _DT_BINDINGS_TI_SERDES - -/* Clock index for output clocks from WIZ */ - -/* MUX Clocks */ -#define TI_WIZ_PLL0_REFCLK 0 -#define TI_WIZ_PLL1_REFCLK 1 -#define TI_WIZ_REFCLK_DIG 2 - -/* Reserve index here for future additions */ - -/* MISC Clocks */ -#define TI_WIZ_PHY_EN_REFCLK 16 - -#endif /* _DT_BINDINGS_TI_SERDES */ diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h deleted file mode 100644 index 6b901b34234..00000000000 --- a/include/dt-bindings/phy/phy.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * - * This header provides constants for the phy framework - * - * Copyright (C) 2014 STMicroelectronics - * Author: Gabriel Fernandez <gabriel.fernandez@st.com> - */ - -#ifndef _DT_BINDINGS_PHY -#define _DT_BINDINGS_PHY - -#define PHY_NONE 0 -#define PHY_TYPE_SATA 1 -#define PHY_TYPE_PCIE 2 -#define PHY_TYPE_USB2 3 -#define PHY_TYPE_USB3 4 -#define PHY_TYPE_UFS 5 -#define PHY_TYPE_DP 6 -#define PHY_TYPE_XPCS 7 -#define PHY_TYPE_SGMII 8 -#define PHY_TYPE_QSGMII 9 -#define PHY_TYPE_DPHY 10 -#define PHY_TYPE_CPHY 11 -#define PHY_TYPE_USXGMII 12 - -#endif /* _DT_BINDINGS_PHY */ |