diff options
Diffstat (limited to 'include')
37 files changed, 0 insertions, 399 deletions
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index de5f42b1011..11a3db59025 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -299,7 +299,6 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #ifdef CONFIG_FMAN_ENET #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 @@ -326,7 +325,6 @@ #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #endif /* diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h index bc8aa3ce054..42e507bac0b 100644 --- a/include/configs/P3041DS.h +++ b/include/configs/P3041DS.h @@ -7,8 +7,6 @@ * P3041 DS board configuration file * */ -#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ - #define CONFIG_SYS_DPAA_RMAN #define CONFIG_SYS_SRIO diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index 6375c65d483..fd558398e4a 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -7,7 +7,6 @@ * P4080 DS board configuration file * Also supports P4040 DS */ -#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ diff --git a/include/configs/P5040DS.h b/include/configs/P5040DS.h index fb73f0b9539..c8fc879d2f8 100644 --- a/include/configs/P5040DS.h +++ b/include/configs/P5040DS.h @@ -7,9 +7,6 @@ * P5040 DS board configuration file * */ -#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ - -#define CONFIG_SYS_FSL_RAID_ENGINE #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index f5e07a929fc..a5461d7fc68 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -413,8 +413,6 @@ #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 #define CONFIG_SYS_DPAA_FMAN - -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 7983a71953d..560083c5b31 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -388,8 +388,6 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME - -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_FMAN_ENET diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 3da9831a028..fc068c94a9e 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -411,8 +411,6 @@ #define CONFIG_SYS_DPAA_DCE #define CONFIG_SYS_DPAA_RMAN /* RMan */ #define CONFIG_SYS_INTERLAKEN - -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN @@ -434,7 +432,6 @@ */ #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #endif /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 813d8fae9c8..056e2d1925b 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -365,8 +365,6 @@ #define CONFIG_SYS_DPAA_DCE #define CONFIG_SYS_DPAA_RMAN /* RMan */ #define CONFIG_SYS_INTERLAKEN - -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN @@ -391,7 +389,6 @@ */ #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #endif /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 332f34e1ff2..bba82f1e0cd 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -368,8 +368,6 @@ #define CONFIG_SYS_DPAA_DCE #define CONFIG_SYS_DPAA_RMAN #define CONFIG_SYS_INTERLAKEN - -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN @@ -397,7 +395,6 @@ #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #endif diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index 925a68787c9..b3e1fddc02f 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -55,13 +55,6 @@ #define IMX_FEC1_BASE ENET1_BASE_ADDR -/* QSPI Configs*/ -#ifdef CONFIG_FSL_QSPI -#define FSL_QSPI_FLASH_SIZE (SZ_16M) -#define FSL_QSPI_FLASH_NUM 2 -#define CONFIG_SYS_FSL_QSPI_LE -#endif - /* boot command, including the target-defined one if any */ /* Extra env settings (including the target-defined ones if any) */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index a4fb2b53dc9..7e65b2b6aa2 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -293,7 +293,6 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #ifdef CONFIG_FMAN_ENET #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c @@ -319,7 +318,6 @@ #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #endif /* diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 249da66237b..79cacd7dacc 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -8,8 +8,6 @@ #ifndef _CONFIG_EB_CPU5282_H_ #define _CONFIG_EB_CPU5282_H_ -#undef CONFIG_SYS_HALT_BEFOR_RAM_JUMP - /*----------------------------------------------------------------------* * High Level Configuration Options (easy to change) * *----------------------------------------------------------------------*/ diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h deleted file mode 100644 index e89b800b7ee..00000000000 --- a/include/configs/ids8313.h +++ /dev/null @@ -1,237 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * Based on: - * Copyright (c) 2011 IDS GmbH, Germany - * Sergej Stepanov <ste@ids.de> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <linux/stringify.h> - -/* - * High Level Configuration Options - */ - -#define CONFIG_SYS_SICRH 0x00000000 -#define CONFIG_SYS_SICRL (SICRL_LBC | SICRL_SPI_D) - -#define CONFIG_HWCONFIG - -/* - * Definitions for initial stack pointer and data area (in DCACHE ) - */ -#define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in DPRAM */ - -/* - * Internal Definitions - */ -/* - * DDR Setup - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -/* - * Manually set up DDR parameters, - * as this board has not the SPD connected to I2C. - */ -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ -#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN |\ - 0x00010000 |\ - CSCONFIG_ROW_BIT_13 |\ - CSCONFIG_COL_BIT_10) - -#define CONFIG_SYS_DDR_CONFIG_256 (CONFIG_SYS_DDR_CONFIG | \ - CSCONFIG_BANK_BIT_3) - -#define CONFIG_SYS_DDR_TIMING_3 (1 << 16) /* ext refrec */ -#define CONFIG_SYS_DDR_TIMING_0 ((3 << TIMING_CFG0_RWT_SHIFT) |\ - (3 << TIMING_CFG0_WRT_SHIFT) |\ - (3 << TIMING_CFG0_RRT_SHIFT) |\ - (3 << TIMING_CFG0_WWT_SHIFT) |\ - (6 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) |\ - (2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) |\ - (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \ - (2 << TIMING_CFG0_MRS_CYC_SHIFT)) -#define CONFIG_SYS_DDR_TIMING_1 ((4 << TIMING_CFG1_PRETOACT_SHIFT) |\ - (12 << TIMING_CFG1_ACTTOPRE_SHIFT) |\ - (4 << TIMING_CFG1_ACTTORW_SHIFT) |\ - (7 << TIMING_CFG1_CASLAT_SHIFT) |\ - (4 << TIMING_CFG1_REFREC_SHIFT) |\ - (4 << TIMING_CFG1_WRREC_SHIFT) |\ - (2 << TIMING_CFG1_ACTTOACT_SHIFT) |\ - (2 << TIMING_CFG1_WRTORD_SHIFT)) -#define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) |\ - (5 << TIMING_CFG2_CPO_SHIFT) |\ - (4 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) |\ - (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) |\ - (0 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) |\ - (1 << TIMING_CFG2_CKE_PLS_SHIFT) |\ - (6 << TIMING_CFG2_FOUR_ACT_SHIFT)) - -#define CONFIG_SYS_DDR_INTERVAL ((0x800 << SDRAM_INTERVAL_REFINT_SHIFT) |\ - (0x800 << SDRAM_INTERVAL_BSTOPRE_SHIFT)) - -#define CONFIG_SYS_SDRAM_CFG (SDRAM_CFG_SREN |\ - SDRAM_CFG_2T_EN | SDRAM_CFG_HSE |\ - SDRAM_CFG_DBW_32 |\ - SDRAM_CFG_SDRAM_TYPE_DDR2) - -#define CONFIG_SYS_SDRAM_CFG2 0x00401000 -#define CONFIG_SYS_DDR_MODE ((0x0448 << SDRAM_MODE_ESD_SHIFT) |\ - (0x0242 << SDRAM_MODE_SD_SHIFT)) -#define CONFIG_SYS_DDR_MODE_2 0x00000000 -#define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075 -#define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_EN |\ - DDRCDR_PZ_NOMZ |\ - DDRCDR_NZ_NOMZ |\ - DDRCDR_ODT |\ - DDRCDR_M_ODR |\ - DDRCDR_Q_DRN) - -/* - * on-board devices - */ -#define CONFIG_TSEC1 -#define CONFIG_TSEC2 - -/* - * NOR FLASH setup - */ -#define CONFIG_FLASH_SHOW_PROGRESS 50 - -#define CONFIG_SYS_FLASH_BASE 0xFF800000 -#define CONFIG_SYS_FLASH_SIZE 8 - -/* - * NAND FLASH setup - */ -#define CONFIG_SYS_NAND_BASE 0xE1000000 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define NAND_CACHE_PAGES 64 - - -/* - * MRAM setup - */ -#define CONFIG_SYS_MRAM_BASE 0xE2000000 -#define CONFIG_SYS_MRAM_SIZE 0x20000 /* 128 Kb */ - -/* - * CPLD setup - */ -#define CONFIG_SYS_CPLD_BASE 0xE3000000 - -/* - * HW-Watchdog - */ -#define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF - -/* - * I2C setup - */ -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 - -/* - * Ethernet setup - */ -#ifdef CONFIG_TSEC1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_SYS_TSEC1_OFFSET 0x24000 -#define TSEC1_PHY_ADDR 0x1 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC1_PHYIDX 0 -#endif - -#ifdef CONFIG_TSEC2 -#define CONFIG_TSEC2_NAME "TSEC1" -#define TSEC2_PHY_ADDR 0x3 -#define TSEC2_FLAGS TSEC_GIGABIT -#define TSEC2_PHYIDX 0 -#endif - -/* - * Serial Port - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600) -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)) - -#define CONFIG_SYS_SCCR_USBDRCM 3 - -/* - * U-Boot environment setup - */ - -/* - * The reserved memory - */ -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - -/* - * Environment Configuration - */ - -#define CONFIG_NETDEV eth1 -#define CONFIG_HOSTNAME "ids8313" -#define CONFIG_ROOTPATH "/opt/eldk-4.2/ppc_6xx" -#define CONFIG_UBOOTPATH "ids8313/u-boot.bin" -#define CONFIG_FDTFILE "ids8313/ids8313.dtb" -#define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mo,eth1addr:mo" - -/* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_LOADS_ECHO -#undef CONFIG_SYS_LOADS_BAUD_CHANGE - -/* mtdparts command line support */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=" __stringify(CONFIG_NETDEV) "\0" \ - "ethprime=TSEC1\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "tftpflash=tftpboot ${loadaddr} ${uboot}; " \ - "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ - " +${filesize}; " \ - "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ - " +${filesize}; " \ - "cp.b ${loadaddr} " __stringify(CONFIG_SYS_TEXT_BASE) \ - " ${filesize}; " \ - "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ - " +${filesize}; " \ - "cmp.b ${loadaddr} " __stringify(CONFIG_SYS_TEXT_BASE) \ - " ${filesize}\0" \ - "console=ttyS0\0" \ - "fdtaddr=0x780000\0" \ - "kernel_addr=ff800000\0" \ - "fdtfile=" __stringify(CONFIG_FDTFILE) "\0" \ - "setbootargs=setenv bootargs " \ - "root=${rootdev} rw console=${console}," \ - "${baudrate} ${othbootargs}\0" \ - "setipargs=setenv bootargs root=${rootdev} rw " \ - "nfsroot=${serverip}:${rootpath} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:" \ - "${netmask}:${hostname}:${netdev}:off " \ - "console=${console},${baudrate} ${othbootargs}\0" \ - "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "\0" - -/* UBI Support */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 2752152f68e..7b9a5b1c541 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -19,14 +19,6 @@ /* Integrator CP-specific configuration */ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */ -/* - * Hardware drivers - */ -#define CONFIG_SMC91111 -#define CONFIG_SMC_USE_32_BIT -#define CONFIG_SMC91111_BASE 0xC8000000 -#undef CONFIG_SMC91111_EXT_PHY - #define CONFIG_SERVERIP 192.168.1.100 #define CONFIG_IPADDR 192.168.1.104 diff --git a/include/configs/km/km-mpc8309.h b/include/configs/km/km-mpc8309.h index af35e8e7926..0468ed5e831 100644 --- a/include/configs/km/km-mpc8309.h +++ b/include/configs/km/km-mpc8309.h @@ -49,11 +49,6 @@ /* GPR_1 */ #define CONFIG_SYS_GPR1 0x50008060 -#define CONFIG_SYS_GP1DIR 0x00000000 -#define CONFIG_SYS_GP1ODR 0x00000000 -#define CONFIG_SYS_GP2DIR 0xFF000000 -#define CONFIG_SYS_GP2ODR 0x00000000 - #define CONFIG_SYS_DDRCDR (\ DDRCDR_EN | \ DDRCDR_PZ_MAXZ | \ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 589ba615dd6..0d470c4b4a1 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -385,8 +385,6 @@ int get_scl(void); #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) - /* Qman / Bman */ /* RGMII (FM1@DTESC5) is local managemant interface */ #define CONFIG_SYS_RGMII2_PHY_ADDR 0x11 diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 2373abf3e31..38063ba4842 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL -#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1 /* early stack pointer */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 2fbd495e119..f318eb58603 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -75,10 +75,6 @@ #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 -/* QSPI */ -#define FSL_QSPI_FLASH_SIZE (1 << 24) -#define FSL_QSPI_FLASH_NUM 2 - /* PCIe */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index b104524becb..8413e68f3a7 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL -#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1 /* * SMP Definitinos diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 43f30fd70f7..1fb1d05eba3 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -114,8 +114,6 @@ #define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 - -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif #endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 2e48ea0f8aa..e5fb111f1b8 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -87,7 +87,6 @@ #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 #endif -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* Miscellaneous configurable options */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 4b8462da7bc..21afe80e70d 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -34,7 +34,6 @@ #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL -#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1 /* * SMP Definitinos */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index ba5af6c34d3..e170b5aa2c7 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -21,15 +21,12 @@ #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL -#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2 /* * SMP Definitinos */ #define CPU_RELEASE_ADDR secondary_boot_addr -#define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS - /* * This is not an accurate number. It is used in start.S. The frequency * will be udpated later when get_bus_freq(0) is available. diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 61870717e8e..d39c0032c4a 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL -#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2 #define CONFIG_SYS_SDRAM_SIZE 0x200000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index b3348bc63bb..0499e633512 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -38,7 +38,6 @@ */ #ifdef CONFIG_CMD_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 1 #endif /* diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index a423dd28b07..fbc9a041693 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -35,7 +35,6 @@ * MMC Configs * */ #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_NUM 2 /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index f1d751f15a2..d58d1534a3b 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -18,7 +18,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 2 /* bootz: zImage/initrd.img support */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 9ceed12e487..60ec34cf8e0 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -15,7 +15,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 2 /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index df4dc4d496c..dcbcd8d2449 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -22,7 +22,6 @@ /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h deleted file mode 100644 index 7adb349f9a5..00000000000 --- a/include/configs/snapper9260.h +++ /dev/null @@ -1,80 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Bluewater Systems Snapper 9260 and 9G20 modules - * - * (C) Copyright 2011 Bluewater Systems - * Author: Andre Renaud <andre@bluewatersys.com> - * Author: Ryan Mallon <ryan@bluewatersys.com> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* SoC type is defined in boards.cfg */ -#include <asm/hardware.h> -#include <linux/sizes.h> - -/* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 - -/* CPU */ - -/* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 - -/* Mem test settings */ - -/* NAND Flash */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 - -/* GPIOs and IO expander */ -#define CONFIG_PCA953X -#define CONFIG_SYS_I2C_PCA953X_ADDR 0x28 -#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} } - -/* UARTs/Serial console */ -#ifndef CONFIG_DM_SERIAL -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS -#endif - -/* I2C - Bit-bashed */ -#define CONFIG_SOFT_I2C_READ_REPEATED_START -#define I2C_INIT do { \ - at91_set_gpio_output(AT91_PIN_PA23, 1); \ - at91_set_gpio_output(AT91_PIN_PA24, 1); \ - at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \ - at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \ - } while (0) -#define I2C_SOFT_DECLARATIONS -#define I2C_ACTIVE -#define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1); -#define I2C_READ at91_get_gpio_value(AT91_PIN_PA23); -#define I2C_SDA(bit) do { \ - if (bit) { \ - at91_set_gpio_input(AT91_PIN_PA23, 1); \ - } else { \ - at91_set_gpio_output(AT91_PIN_PA23, 1); \ - at91_set_gpio_value(AT91_PIN_PA23, bit); \ - } \ - } while (0) -#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit) -#define I2C_DELAY udelay(2) - -/* Boot options */ - -/* Environment settings */ - -/* Console settings */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 498deb4e3fc..762ba44542d 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -103,7 +103,6 @@ /* FPGA and NAND */ #define CONFIG_SYS_FPGA_BASE 0xc0000000 #define CONFIG_SYS_FPGA_SIZE 0x00100000 /* 1 MB */ -#define CONFIG_SYS_HMI_BASE 0xc0010000 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70) #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 2632d56cb1c..08a6f5fbccd 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -21,7 +21,6 @@ /* SD/MMC */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 1 /* USB */ #define CONFIG_MXC_USB_PORT 1 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 077428f5004..0c11b6b3331 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -84,12 +84,6 @@ #endif #endif /* !CONFIG_GICV3 */ -#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && !defined(CONFIG_DM_ETH) -/* The Vexpress64 BASE_FVP simulator uses SMSC91C111 */ -#define CONFIG_SMC91111 1 -#define CONFIG_SMC91111_BASE (V2M_PA_BASE + 0x01A000000) -#endif - /* PL011 Serial Configuration */ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define CONFIG_PL011_CLOCK 7372800 diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 32d9df0a00c..c13f2ba196e 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -21,7 +21,6 @@ #endif #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 1 #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/warp.h b/include/configs/warp.h index 7cb9743fddb..d2c4391935e 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -18,7 +18,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE /* Watchdog */ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index c00ca4a1117..7e9b25b07b2 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -15,7 +15,6 @@ /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 025d7a1e74b..24229f6bc44 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -14,11 +14,6 @@ struct cmd_tbl; -#ifndef CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS -/* All controllers are for main memory */ -#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_SYS_NUM_DDR_CTLRS -#endif - #ifdef CONFIG_SYS_FSL_DDR_LE #define ddr_in32(a) in_le32(a) #define ddr_out32(a, v) out_le32(a, v) |