diff options
Diffstat (limited to 'src/arm/intel/socfpga')
-rw-r--r-- | src/arm/intel/socfpga/socfpga_arria10.dtsi | 6 | ||||
-rw-r--r-- | src/arm/intel/socfpga/socfpga_cyclone5_mcvevk.dts | 2 | ||||
-rw-r--r-- | src/arm/intel/socfpga/socfpga_cyclone5_socdk.dts | 6 |
3 files changed, 3 insertions, 11 deletions
diff --git a/src/arm/intel/socfpga/socfpga_arria10.dtsi b/src/arm/intel/socfpga/socfpga_arria10.dtsi index 6b6e77596ff..b108265e9bd 100644 --- a/src/arm/intel/socfpga/socfpga_arria10.dtsi +++ b/src/arm/intel/socfpga/socfpga_arria10.dtsi @@ -440,7 +440,7 @@ clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; clock-names = "stmmaceth", "ptp_ref"; resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>; - reset-names = "stmmaceth", "ahb"; + reset-names = "stmmaceth", "stmmaceth-ocp"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -460,7 +460,7 @@ clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; clock-names = "stmmaceth", "ptp_ref"; resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>; - reset-names = "stmmaceth", "ahb"; + reset-names = "stmmaceth", "stmmaceth-ocp"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -480,7 +480,7 @@ clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; clock-names = "stmmaceth", "ptp_ref"; resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>; - reset-names = "stmmaceth", "ahb"; + reset-names = "stmmaceth", "stmmaceth-ocp"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; diff --git a/src/arm/intel/socfpga/socfpga_cyclone5_mcvevk.dts b/src/arm/intel/socfpga/socfpga_cyclone5_mcvevk.dts index ceaec29770c..c1e1264bcb0 100644 --- a/src/arm/intel/socfpga/socfpga_cyclone5_mcvevk.dts +++ b/src/arm/intel/socfpga/socfpga_cyclone5_mcvevk.dts @@ -50,8 +50,6 @@ stmpe1: stmpe811@41 { compatible = "st,stmpe811"; - #address-cells = <1>; - #size-cells = <0>; reg = <0x41>; id = <0>; blocks = <0x5>; diff --git a/src/arm/intel/socfpga/socfpga_cyclone5_socdk.dts b/src/arm/intel/socfpga/socfpga_cyclone5_socdk.dts index d37a982e857..97622febc44 100644 --- a/src/arm/intel/socfpga/socfpga_cyclone5_socdk.dts +++ b/src/arm/intel/socfpga/socfpga_cyclone5_socdk.dts @@ -151,12 +151,6 @@ &spi0 { status = "okay"; - - spidev@0 { - compatible = "rohm,dh2228fv"; - reg = <0>; - spi-max-frequency = <1000000>; - }; }; &usb1 { |