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2024-10-14ufs: Add Support for Qualcomm UFS HC driverBhupesh Sharma
Add Support for the Host Controller driver for UFS HC present on Qualcomm Snapdragon SoCs. It has been successfully tested on SDM845, SM8250, SM8550 ant SM8650 SoCs. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Julius Lehmann <lehmanju@devpi.de> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> #rb3gen2 Link: https://lore.kernel.org/r/20240910-topic-ufs-qcom-controller-v1-4-54c0d2231b10@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: allow UFSHCI version 4.0Neil Armstrong
Add UFSHCI version 4.0 found on the recent Qualcomm UFS Controllers. Tested-by: Julius Lehmann <lehmanju@devpi.de> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> #rb3gen2 Link: https://lore.kernel.org/r/20240910-topic-ufs-qcom-controller-v1-3-54c0d2231b10@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: add get_max_pwr_mode callbackNeil Armstrong
Add a new get_max_pwr_mode callback to permit the UFS controller driver manipulate the max_pwr_mode struct right before setting the new pwr_mode to the UFS device. It can be used to limit the HS Gear with errata and hardware limitations on some UFS controllers. Tested-by: Julius Lehmann <lehmanju@devpi.de> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> #rb3gen2 Link: https://lore.kernel.org/r/20240910-topic-ufs-qcom-controller-v1-2-54c0d2231b10@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: add device_reset callbackNeil Armstrong
Add device_reset op to permit resetting the UFS device if the UFS controller drivers supports the operation. Tested-by: Julius Lehmann <lehmanju@devpi.de> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> #rb3gen2 Link: https://lore.kernel.org/r/20240910-topic-ufs-qcom-controller-v1-1-54c0d2231b10@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14configs: versal2: Add support for AMD UFS platform driverVenkatesh Yadav Abbarapu
Enable AMD UFS platform driver. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20240920041651.18173-4-venkatesh.abbarapu@amd.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: ufs-amd-versal2: Add support for AMD UFS controllerVenkatesh Yadav Abbarapu
Add UFS AMD platform support on top of the UFS DWC and UFS platform driver. UFS AMD platform requires some platform specific configurations like M-PHY/RMMI/UniPro and vendor specific registers programming before doing the LINKSTARTUP. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240920041651.18173-3-venkatesh.abbarapu@amd.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: add support for DesignWare ControllerVenkatesh Yadav Abbarapu
This patch has the goal to add support for DesignWare UFS Controller specific operations. This is based on linux kernel commit: "drivers/scsi/ufs/ufshcd-dwc.c: ufs: add support for DesignWare Controller" (sha1: 4b9ffb5a353bdee49f1f477ffe2b95ab3f9cbc0c) It is ported from linux kernel 6.11-rc1. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240920041651.18173-2-venkatesh.abbarapu@amd.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14MAINTAINERS: Add myself to the list of UFS maintainersNeil Armstrong
Adding myself to continue Bhupesh's work to enhance and fix UFS support in U-Boot, especially for Qualcomm SoCs, and help review patches and maintain the UFS subsystem. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-13-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: core: remove link_startup_again logicNeil Armstrong
The link_startup_again logic was added in Linux to handle device that were set in LinkDown state, which should not be the case since U-boot doesn't set LinkDown state are init, and Linux sets the device active in ufshcd_init() for the first link startup. ufshcd_set_ufs_dev_active(hba) is called at ufshcd_init() right before scheduling an ufshcd_async_scan that will call ufshcd_device_init() then ufshcd_link_startup(). The comment in probe says: /* * We are assuming that device wasn't put in sleep/power-down * state exclusively during the boot stage before kernel. * This assumption helps avoid doing link startup twice during * ufshcd_probe_hba(). */ we can assume the same from U-Boot. While it worked to far, it breaks link startup for Qualcomm Controllers v5, let's just remove the logic. Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-12-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Fix debug message in 'ufs_start'Bhupesh Sharma
Minor typo fix and rewording of printf message inside 'ufs_start' which announces the availability of the UFS device. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-11-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Add missing memory barriersBhupesh Sharma
Add missing wmb() and mb() barriers in the u-boot UFS core framework driver to allow registers updates to happen before follow-up read operations. This makes the barrier placement similar to the Linux UFS driver, synced from the Linux v6.9 release. Starting from the v6.10 release, the barriers were replaced with a register read-back in [1], this will ported to u-boot in a second time. [1] https://lore.kernel.org/all/20240329-ufs-reset-ensure-effect-before-delay-v5-0-181252004586@redhat.com/ Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-10-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Sync possible UFS Quirks with Linux UFS driverBhupesh Sharma
Sync u-boot UFS driver to add all possible UFS Quirks as supported by Linux UFS driver as well. Synced with include/ufs/ufshcd.h from Linux v6.11 release Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-9-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Clear UECPA once due to LINERESET has happened during LINK_STARTUPBhupesh Sharma
Clear UECPA once in u-boot UFS driver due to LINERESET has happened during LINK_STARTUP. This makes the u-boot ufs driver behavior related to UECPA similar to Linux UFS driver. Ported from Linux kernel commit: 2355b66ed20c ("scsi: ufs: Handle LINERESET indication in err handler") Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-8-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs/ufs.h: Add definition of 'ufshcd_rmwl()'Bhupesh Sharma
Add definition of 'ufshcd_rmwl()' helper function which would be later used by Qualcomm UFS driver to read-modify-write registers. Ported from Linux kernel commits: e785060ea3a1 ("ufs: definitions for phy interface") cff91daf52d3 ("scsi: ufs: Fix kernel-doc syntax in ufshcd.h") Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-7-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Add UFSHCD_QUIRK_HIBERN_FASTAUTOMarek Vasut
Add UFSHCD_QUIRK_HIBERN_FASTAUTO quirk for host controllers which supports auto-hibernate the capability but only FASTAUTO mode. Ported from Linux kernel commit 2f11bbc2c7f3 ("scsi: ufs: core: Add UFSHCD_QUIRK_HIBERN_FASTAUTO") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-6-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESSMarek Vasut
Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS for host controllers which do not support 64-bit addressing. Ported from Linux kernel commit 6554400d6f66 ("scsi: ufs: core: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS") with ufs_scsi_buffer_aligned() based on U-Boot generic bounce buffer. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-5-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: use dcache helpers for scsi_cmd data and only invalidate if necessaryNeil Armstrong
Now we have proper flush and invalidate helpers, we can use them directly to operate on the scsi_cmd data. Likewise, we do not need to flush then invalidate, just flush _or_ invalidate depending on the data direction. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-4-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: split flush and invalidate to only invalidate when requiredNeil Armstrong
There is no need to flush and invalidate all data updated by the driver, mainly because on ARM platforms flush also invalidates the cachelines. Split the function in two and add the appropriate cacheline invalidates after the UFS DMA operation finishes to make sure we read from memory. Flushing then invalidating cacheline unaligned data causes data corruption issues on Qualcomm platforms, and is largely unnecessary anyway, so let's cleanup the cache operations. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-3-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: fix dcache flush and invalidate range calculationNeil Armstrong
The current calculation will omit doing a flush/invalidate on the last cacheline if the base address is not aligned with DMA_MINALIGN. This causes commands failures and write corruptions on Qualcomm platforms. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-2-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: allocate descriptors with size aligned with DMA_MINALIGNNeil Armstrong
Align the allocation size with DMA_MINALIGN to make sure we do not flush/invalidate data from following allocations. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-1-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-13Merge tag 'u-boot-imx-master-20241013' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22644 - Add fast authentication method for i.MX8M signing. - Migrate imx8mp-debix-model-a to OF_UPSTREAM. - Update MAINTAINERS file globs for i.MX6/i.MX8MP DHSOM. - Improve ELE driver. - Add i.MX8MP Dummy clk to fix regression.
2024-10-13Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegraTom Rini
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes, resolve some whitespace issues and fix the name of the new apalis-tk1 env file by Tom. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-13video: panel: add Sharp LQ101R1SX01 MIPI DSI panel driverSvyatoslav Ryhel
This module is a color active matrix LCD module incorporating Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD panel, driver ICs, a control circuit and power supply circuit, and a backlight unit. Graphics and texts can be displayed on a 2560×1600 dots panel with (16,777,216) colors by using MIPI DUAL DSI interface, supplying +3.3V DC supply voltage for TFT-LCD panel driving and supplying DC supply voltage for LED Backlight. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13video: tegra20: dsi: add ganged mode supportSvyatoslav Ryhel
Implement ganged mode support for the Tegra DSI driver. The DSI host controller to gang up with is specified via a phandle in the device tree and the resolved DSI host controller used for the programming of the ganged-mode registers. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13video: tegra20: dc: remove DECLARE_GLOBAL_DATA_PTR useSvyatoslav Ryhel
It seems that DECLARE_GLOBAL_DATA_PTR use is not needed and video system works perfectly fine without it. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13usb: host: tegra: get usb phy configuration from phy nodeSvyatoslav Ryhel
Obtain USB phy configuration from phy node if such exists and is enabled. If no, set default values. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13arm: tegra: add AP20 and AP20H SKUIon Agorria
Add previously undocumented SKU - AP20H found in LG Optimus 2X (P990). Correct existing T20_7 name as it's proper name is AP20. Signed-off-by: Ion Agorria <ion@agorria.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13arm: tegra: fix typo in logging functionsIon Agorria
Change %02X to %02x since it always displayed 00 otherwise. Signed-off-by: Ion Agorria <ion@agorria.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13board: asus: transformer: implement multi-DTB supportSvyatoslav Ryhel
Use board revision detection mechanism to choose correct DTB. Adjust documentation and build setup accordingly. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13board: asus: grouper: implement multi-DTB supportSvyatoslav Ryhel
Use board revision detection mechanism to choose correct DTB. Adjust documentation and build setup accordingly. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13board: htc: endeavoru: simplify RCM hookSvyatoslav Ryhel
Use SPL GPIO functions to simplify RCM hook on HTC One X. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13board: asus: grouper: dynamically detect correct SPL configurationSvyatoslav Ryhel
Use PMIC detection mechanism to find correct configuration. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13drivers: tegra_gpio: add early SPL functionsSvyatoslav Ryhel
In some cases access to GPIOs is needed so early that DM is not ready even nearly. These functions are exactly for this case. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13ARM: tegra-u-boot: add recipe for multi-dtb imageSvyatoslav Ryhel
Buildman has difficulties with constructing multi-dtb images, so let's add a temporary custom recipe for it. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13ARM: tegra: board2: add common dtb reselect logicSvyatoslav Ryhel
Add common logic for dynamic dtb switch and DM reload if board features multi-dtb support. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13Tegra30: Add funcmux for UART over SD slotJonas Schwöbel
Tegra 3 has UART-E exposable via SD card slot which may be handy for debugging. This change only adds funcmux part, to use UART-E on the device you additionally would need: - set stdout-path to serial@70006400 (uarte) - configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for uarte - disable or remove sdhci@7800000 node - enable CONFIG_TEGRA_ENABLE_UARTE in defconfig - set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device header Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13board: tegra: convert boards to text envSvyatoslav Ryhel
Convert boards to use text based env. This is the first stage of conversion, common inclusions should be converted next. Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com> # Toradex Apalis TK1 Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13disk: add TegraPT supportSvyatoslav Ryhel
TegraPT is compatible with EFI part but it can't pass Protective MBR check. Skip this check if CONFIG_TEGRA_PARTITION is enabled, storage uclass is MMC and devnum is 0. Note, eMMC on supported devices MUST be aliased to mmc0. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13clk: imx8mp: Add i.MX8MP Dummy clkPeng Fan
i.MX8MP SDHC use CLK_IMX8MP_DUMMY clk entry. Without the clk, the bulk api will return failure. The correct entry should be replaced with IMX8MP_IPG_ROOT clk in device tree. This will be done in Kernel device tree and sync to U-Boot in future: https://lore.kernel.org/all/20241012025221.1728438-1-peng.fan@oss.nxp.com/ Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API") Reported-by: Gilles Talis <gilles.talis@nxp.com> Tested-by: Gilles TALIS <gilles.talis@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13arm64: imx: imx8mp-debix-model-a: Migrate to OF_UPSTREAMGilles Talis
Device tree for this board can be deleted. Device tree location now points to the freescale/ directory. Use absolute path to PMIC node entry and its regulators as device tree in kernel does not provide corresponding labels Signed-off-by: Gilles Talis <gilles.talis@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2024-10-13imx8: Correct the SCU API return value checkPeng Fan
The SCU API alreay has been converted to return Linux error code, using SCU error code is not correct here, although SC_ERR_NONE is value as 0. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13binman: add fast authentication method for i.MX8M signingBrian Ruley
Using the PKI tree with SRKs as intermediate CA isn't necessary or even desirable in some situations (boot time, for example). Add the possibility to use the "fast authentication" method where the image and CSF are both signed using the SRK [1, p.63]. [1] https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors/202591/1/CST_UG.pdf Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-13binman: cosmetic: refactor `nxp_imx8mcst' etype codeBrian Ruley
Simplify code and conform to the style guide used in the project by making the following changes: * Capitalize global constants * Use single quotes for multiline strings (except docstrings) * Fix line width to 79 cols * Use f-string instead of formatting a regular string or using a complicated concatenation * Move common suffix used in keys to a global variable "KEY_NAME" to reduce the likelihood of typos and making future changes easier Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com> Cc: Marek Vasut <marex@denx.de>
2024-10-13ARM: imx: Update MAINTAINERS file globs for i.MX8MP DHSOMMarek Vasut
Update the MAINTAINERS file glob to cover all of i.MX8MP DHSOM related files. Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-13ARM: imx: Update MAINTAINERS file globs for i.MX6 DHSOMMarek Vasut
Update the MAINTAINERS file glob to cover all of i.MX6 DHSOM related files. Signed-off-by: Marek Vasut <marex@denx.de>
2024-10-13misc: fuse: Update fuse driverYe Li
When OSCCA is enabled, FSB fuse shadow (offset 0x8000) access is disabled for SOC. So update the driver to read fuse from ELE API. The ELE has supported to read all shadow fuses like FSB, reuse the table of FSB for the word index used by ELE API. Add ELE shadow fuse read and write to current ELE fuse driver. But when LC is OEM closed, the ELE read/write shadow fuse APIs are forbidden. Reading from any fuse will return error. This causes problem to u-boot which must read out some fuse no matter whatever LC. So we have to change back to read from FSB and ELE common fuse read API. For using ELE shadow read API for development purpose like checking the ELE shadow fuse write result, user can set env variable "enable_ele_shd" to y to switch it. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: fuse: Fix FSB redundancy fuse word check and clear resYe Li
There is a bug when checking fuse word with redundancy fuse in FSB table. The redundancy fuses are combined into 4 words, so we can't directly use word index to do the check, otherwise the high 4 words will fail to match. And When calling ELE API, res parameter will pass to ELE API to get ELE response value for failure. So most of usage does not initialize this variable and print it after calling ELE API. However, when ELE API returns failure, we can't ensure this res is always set because there may be other failure like MU failure. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: ele_api: Add read/write shadow fuse APIsYe Li
Add ELE APIs to support read and write shadow fuses Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: ele_api: Update ELE read common fuse APIPeng Fan
On iMX8ULP, the word index 1 is used to read OTP_UNIQ_ID with 4 words data responsed. However this special index does not apply others. So restrict the check to i.MX8ULP to avoid problem when reading from fuse word 1 for others, such as i.MX93. Also update header order Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: ele_mu: Clear RR when initialize MUPeng Fan
When OS is doing ELE API call, before OS get the response, OS is force reseted, then it is possible that MU RR has data during initialization in SPL stage. So clear the RR registers, otherwise SPL ELE API call will work abnormal. Cc: Alice Guo <alice.guo@nxp.com> Cc: Marek Vasut <marex@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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