| Age | Commit message (Collapse) | Author |
|---|
|
Rather than rely on manual updates from the arch/arm/dts directory,
enable CONFIG_OF_UPSTREAM to receive automatic device tree updates for
the am65x reference board.
Signed-off-by: Bryan Brattlof <bb@ti.com>
|
|
https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx changes for v2025.01-rc3:
- microblaze:
- Disable JFFS2
- fpga:
- pass compatible flag to fpga_load()
- zynqmp:
- SOM RTC fix
- SC(system controller) PMW polarity fix
- Fix ram_top calculation with introducing XILINX_MINI
- Fix RPU release command
- versal:
- Enable capsule update
- Enable soft reset and Micron octal flashes
- xilinx:
- Align Kconfig regarding SPI_STACKED_PARALLEL
- bootcount:
- Add new zynqmp driver
|
|
There is no common symbol which mini configurations are using and recent
get_mem_top() changes adding 1.3kB without having a way to remove it.
That's why introduce new symbol which can be used for removing features
which are not requested by these configurations.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aa27b72e17057fa8cbdd92a2bbb863a31c8c1226.1731681053.git.michal.simek@amd.com
|
|
JFFS2 is not maintained for quite a long time and none should be using it.
Please use other filesystems for flashes like UBIFS instead.
Also remove jffs to MTD map but MTD map is for example that's why it won't
affect anything.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a8239acee8886229fdbff66142c46d522e3fe851.1731659933.git.michal.simek@amd.com
|
|
For RTC to start to operate there is a need to call the driver. The simple
way to do it is to set default RTC instance which will call the probe and
do basic initialization.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/01155f1555dbd42adc618906629f5fb45754d5a4.1731419926.git.michal.simek@amd.com
|
|
Activate the xSPI Software Reset support, which will be
utilized to transition from octal DTR mode to legacy
mode during shutdown and boot (if enabled).
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114042641.22642-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
|
|
The Micron MT35 series octal flashes can be activated
through the configuration option CONFIG_SPI_FLASH_MT35XU.
To ensure their detection, enable this option in the
default defconfig for octal flashes.
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114051047.13700-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
|
|
Moving the hw_reset function from the controller driver to
the NOR framework has caused the OSPI reset not to be triggered
in the Cadence driver's probe function. As a result, reading the
flash ID during SPI calibration is incorrect, and the
CQSPI_REG_RD_DATA_CAPTURE is set with an invalid value.This makes
it unable to read the flash ID properly.
To solve this problem, it's suggested to skip SPI calibration and
instead retrieve the read_delay directly from the device tree.
Skipping SPI calibration doesn't bring harm since there's no need
for the flash golden values stored during SPI calibration.
Instead, they are now read during the spi_nor_read_id call in the
NOR framework.
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114062045.17581-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
|
|
ut_check_console_line() does include an assert.
Pass the result to ut_assertok().
Addresses-Coverity-ID: 514958 Error handling issues
Fixes: 7dfafcd65ef3 ("test: unit test for hash command")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
|
Some Kconfig symbols introduced in commit 8cb330355bd5 ("net: introduce
alternative implementation as net/lwip/") need a full description. The
NET symbol needs one, too.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
The maximum length of a domain name is 253 as defined in RFC 1035.
So SERVER_NAME_SIZE should be 254 including NUL.
Fixes: 3c656c928bd7 ("net: lwip: add wget command")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
Nam Cao <namcao@linutronix.de> says:
We observed the following sporadic boot failure while booting from MMC
device:
=> boot
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
** Booting bootflow 'mmc@2194000.bootdev.part_1' with extlinux
Ignoring unknown command: �D���D��
Boot failed (err=-14)
The reason is because while allocating buffer to read a file from MMC,
alignment of 1 byte is used. Thus, the buffer doesn't work for performing
DMA, and garbage data is read.
While looking at this issue, I also noticed that if no alignment specified
(align=0) then fs_read_alloc() is documented to use the default. But the
default is no alignment. Therefore, other users of fs_read_alloc() which
specify align=0 may be broken as well.
The first patch changes extlinux_read_bootflow() to use proper buffer
alignment for DMA.
The second patch changes the default alignment of fs_read_alloc() to be
DMA-suitable, to fix other potential bugs.
|
|
The comment above fs_read_alloc() explains:
@align: Alignment to use for memory allocation (0 for default)
However, in the actual implementation, there is no alignment when @align is
zero.
This current default is probably fine for most cases. But for some block
devices which transfer data via DMA, ARCH_DMA_MINALIGN is needed.
Change the default alignment to ARCH_DMA_MINALIGN.
Fixes: de7b5a8a1ac0 ("fs: Create functions to load and allocate a file")
Signed-off-by: Nam Cao <namcao@linutronix.de>
Tested-by: Javier Fernandez Pastrana <javier.pastrana@linutronix.de>
|
|
extlinux_read_bootflow() allocates a buffer to read from file system
without any alignment.
But for some block devices which transfer data via DMA, ARCH_DMA_MINALIGN
alignment is required. For example, due to misaligned buffer, the below
boot failure is observed.
=> boot
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
CACHE: Misaligned operation at range [9efa25f8, 9efa27f8]
** Booting bootflow 'mmc@2194000.bootdev.part_1' with extlinux
Ignoring unknown command: �D���D��
Boot failed (err=-14)
Change the buffer alignment to ARCH_DMA_MINALIGN.
Fixes: 31aefaf89a5b ("bootstd: Add an implementation of distro boot")
Signed-off-by: Nam Cao <namcao@linutronix.de>
Tested-by: Javier Fernandez Pastrana <javier.pastrana@linutronix.de>
|
|
https://source.denx.de/u-boot/custodians/u-boot-tpm
CI: https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/23393
- Two changes from Heinrich:
- One is adding some missing TPM files for proper maintenance.
- The second addresses Coverity-ID: 356664 replacing a mempcy() which
has undefined behavior with memmove()
|
|
All TPM code should be maintained.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
The behavior of memcpy() for overlapping buffers is undefined.
Fixes: 4c57ec76b725 ("tpm: Implement state command for Cr50")
Addresses-Coverity-ID: 356664 Overlapping buffer in memory copy
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
We don't use this feature, we can remove it therefore in the defconfigs.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
|
|
Running commands such as 'load mmc 2:1 $addr $path' when path does not
exists will print an error twice if the file does not exist, e.g.:
```
Cannot lookup file boot/boot.scr
Failed to load 'boot/boot.scr'
```
(where the first line is printed by btrfs and the second by common fs
code)
Historically other filesystems such as ext4 or fat have not been
printing a message here, so do the same here to avoid duplicate.
The other error messages in this function are also somewhat redundant,
but bring useful diagnostics if they happen somewhere, so have been left
as printf.
Note that if a user wants no message to be printed for optional file
loads, they have to check for file existence first with other commands
such as 'size'.
Signed-off-by: Dominique Martinet <dominique.martinet@atmark-techno.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
|
|
Rephrasing the error and warning messages to be more meaningful and
clear.
Signed-off-by: Love Kumar <love.kumar@amd.com>
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/23373
- Fix a missing break for CMD_DCD_SKIP reported by Coverty on imx8image.
- Fix i.MX thermal threshold regression.
|
|
Fix the critical thermal threshold for i.MX processors, this was changed
while moving the code from imx8m/imx9 directories into a shared place.
There is no need to keep the critical threshold 5 degrees less than the
SoC maximum temperature threshold, what is actually going to happen in
practice is that we are going to power-off the board when the SoC is
still within its working temperature range.
In addition to that this is a change in the actual behavior, that is
introducing a regression to users, and it was hidden within a software
refactoring.
Fixes: d0fe80890ab1 ("imx: Generalize fixup_thermal_trips")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
|
|
The CMD_DCD_SKIP case misses a break statement.
Add it.
Fixes: 254c00803b63 ("tools: imx8image: add possibility to skip dcd")
Addresses-Coverity-ID: 514648: Control flow issues (MISSING_BREAK)
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
|
|
Add native support of the bootcount mechanism in the ZynqMP by
utilising internal PMU registers. The Persistent Global Storage
Registers of the Platform Management Unit can keep their value
during reboot cycles unless there is a POR reset, making them
appropriate for the bootcount mechanism.
Signed-off-by: Vasileios Amoiridis <vasileios.amoiridis@cern.ch>
Reviewed-by: Heiko Schocher <hs@denx.de>
Link: https://lore.kernel.org/r/20241105132744.1572759-2-vassilisamir@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
|
|
For E.G. signed FPGA bitstreams, similar to how it is done for the FPGA
loading from SPL since commit 71f1a5392aad ("spl: fit: pass real compatible
flags to fpga_load()").
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Link: https://lore.kernel.org/r/20241105162136.839633-1-peter@korsgaard.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
|
|
Enable capsule update in SD boot mode. For getting it work there is a need
to generate or setup dfu_alt_info and enable sysreset with DFU_MMC.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/cede513de764b99560dc3737457dbc8a5cc71d21.1729857366.git.michal.simek@amd.com
|
|
If sysreset is enabled reset_cpu is defined in sysreset uclass that's why
it can't be in platform/board code.
The same change was done by commit f1bc214b0024 ("arm64: zynqmp: Do not
define do_reset() if sysreset is enabled").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8c1a5d6148c5e6c46790b725e8148a4e12d393ba.1729857366.git.michal.simek@amd.com
|
|
The cpu release command for r5 mode (lockstep/split) argument
accepts only string. But the zynqmp tcminit command accepts
string or number for r5 mode (lockstep/split or 0/1) argument.
To fix the r5 mode argument, the common argument (lockstep/split
or 0/1) is used across different u-boot commands. Use the strcmp()
instead of strncmp() to make uniform the r5 mode (lockstep/split
or 0/1) for the zynqmp tcminit and cpu release command.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20241104122750.96251-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
|
|
Align defconfigs with the latest Kconfig layout.
Fixes: f896aa656774 ("mtd: spi-nor: Rename SPI_ADVANCE to SPI_STACKED_PARALLEL")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fe05a0e542d6117c10956e4a104123e46f956793.1730450241.git.michal.simek@amd.com
|
|
Use the get_mem_top function to compute the value of ram_top. This was
earlier done through LMB API's, which are no longer available till
after relocation. Use get_mem_top() instead to compute the ram_top
value.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20241025172724.195093-3-sughosh.ganu@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
|
|
Add generic logic to determine the ram_top value for boards. Earlier,
this was achieved in an indirect manner through a set of LMB API's.
That has since changed so that the LMB code is available only after
relocation. Replace those LMB calls with a single call to
get_mem_top() to determine the value of ram_top.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20241025172724.195093-2-sughosh.ganu@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
|
|
Add test overlay .S and u_boot_logo file to gitignore as these files are
generated and should not be committed but ignored.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
In the message string " %s[%d]\t[0x%llx-0x%llx], 0x%08llx bytes flags: "
a comma is missing before flags.
To avoid increasing the code size replace '0x%' by '%#'.
Printing the size with leading zeros but not the addresses does not really
make sense. Remove the leading zeros from the size output.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
[trini: Fix test/cmd/bdinfo.c for these changes]
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
For printing size_t we must use %zd and not %ld to avoid
a -Wformat error on 32-bit systems.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
|
Availability of %ls in printf() depends on having
CONFIG_EFI_LOADER or CONFIG_EFI_APP.
Respect this when testing.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
We want to completely initialize the mbr and embr buffers. This requires
passing the buffer size and not the size of a pointer to the buffer.
Addresses-Coverity-ID: 510454 Wrong sizeof argument
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
|
When calling decode_addr_size() we must pass the size of the device-tree
property and not sizeof(void *).
Fixes: 90469da3da0d ("upl: Add support for reading a upl handoff")
Addresses-Coverity-ID: 510459 Wrong sizeof argument
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
|
do_upl_write() calls upl_get_test_data() which may increment the fail
count in the unit test state. We should initialize it.
Addresses-Coverity-ID: 510465 Uninitialized scalar variable
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Falltroughs in switch statements should be explicit.
Addresses-Coverity-ID: 131162 Missing break in switch
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
|
Commit c3cf0dc64f1c ("lmb: add a check to prevent memory overrun")
addressed a possible buffer overrun using assert_noisy().
Resetting via panic() in lmb_print_region() while allowing invalid
lmb flags elsewhere is not reasonable.
Instead of panicking print a message indicating the problem.
fls() returns an int. Using a u64 for bitpos does not match.
Use int instead.
fls() takes an int as argument. Using 1ull << bitpos generates a u64.
Use 1u << bitpos instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
|
|
RFC 3447 says that Typical salt length are either 0 or the length
of the output of the digest algorithm, RFC 4055 also recommends
hash value length as the salt length. Moreover, By convention,
most of the signing infrastructures/libraries use the length of
the digest algorithm (such as google cloud kms:
https://cloud.google.com/kms/docs/algorithms).
If the salt-length parameter is not set, openssl default to the
maximum allowed value, which is a openssl 'specificity', so this
works well for local signing, but restricts compatibility with
other engines (e.g pkcs11/libkmsp11):
```
returning 0x71 from C_SignInit due to status INVALID_ARGUMENT:
at rsassa_pss.cc:53: expected salt length for key XX is 32,
but 478 was supplied in the parameters
Could not obtain signature: error:41000070:PKCS#11 module::Mechanism invalid
```
To improve compatibility, we set the default RSA-PSS salt-length
value to the conventional one. A further improvement could consist
in making it configurable as signature FIT node attribute.
rfc3447: https://datatracker.ietf.org/doc/html/rfc3447
rfc4055: https://datatracker.ietf.org/doc/html/rfc4055
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
|
|
Fix various code style issues in the lwIP code.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
|
One can use ccache by prefixing the typical CROSS_COMPILE value with
"ccache " (e.g. "ccache aarch64-gnu-linux-" for Aarch64). This however
makes the MK_ARCH empty because sed won't find a match anymore since it
expects the CROSS_COMPILE value to start with the actual toolchain (with
an unlimited number of white spaces before).
This is failing builds since commit 7506c1566998 ("sandbox: Report host
default-filename in native mode").
Add "ccache" prefix to ignore but participate in the matching regex used
by sed to identify the target architecture.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
|
|
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says:
Commit f9886bc60f42 ("Added arm64 assembly for examples/api crt0") added
the arm64 architecture but the code does not even build.
With the changes the 'demo' program runs on qemu_arm64_defconfig using
setenv autostart no
dhcp demo
setenv autostart yes
bootelf $loadaddr
Link: https://lore.kernel.org/r/20241103053551.52715-1-heinrich.schuchardt@canonical.com
|
|
Commit f9886bc60f42 ("Added arm64 assembly for examples/api crt0")
added a 64-bit target for the examples but did not adjust the demo
code to be 64-bit compatible.
Change variable size for pointers.
Use %p to print pointers.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
|
Change the load address on arm64 such that it is compatible with the memory
available on qemu_arm64_defconfig.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
|
Commit f9886bc60f42 ("Added arm64 assembly for examples/api crt0") tried to
add arm64 support to the examples but crt0.S does not even build for
qemu_arm64_defconfig with CONFIG_API=y, CONFIG_EXAMPLES=y:
examples/api/crt0.S: Assembler messages:
examples/api/crt0.S:32: Error:
expected a register at operand 1 -- `ldr ip,=search_hint'
examples/api/crt0.S:33: Error:
unexpected register type at operand 1 -- `str sp,[ip]'
make[2]: *** [scripts/Makefile.build:292: examples/api/crt0.o] Error 1
Do not define _start twice.
Use valid register names.
Move syscall_ptr and search_hint to the data section to avoid an invalid
relocation.
Fixes: f9886bc60f42 ("Added arm64 assembly for examples/api crt0")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
|
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says:
Since commit 348ea878508d ("cmd: hash: fix param count check") the hash
command cannot be used without the optional variable name parameter if
CONFIG_HASH_VERIFY=y. 'hash sha1 $loadaddr $filesize' returns
CMD_RET_USAGE.
The minimum number of arguments is four no matter if verification is
enabled or not.
Fix the parameter check.
Provide a unit test.
Link: https://lore.kernel.org/r/20241102100836.103005-1-heinrich.schuchardt@canonical.com
|
|
Wadim Egorov <w.egorov@phytec.de> says:
Our SoMs are available in multiple configurations, managed via device
tree overlays. To determine the specific variant in use, we read the
EEPROM and apply the appropriate overlays during boot to the device tree
used by the OS.
Apply overlays for phyCORE-AM62x and phyCORE-AM64x SoMs.
Future K3 SoMs will be able to reuse this logic and overlays.
Link: https://lore.kernel.org/r/20241030164815.1763506-1-w.egorov@phytec.de
|
|
Provide a unit test testing the hash command.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
