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2025-07-10binman: Add renesas_rcar4_sa0 etypeMarek Vasut
Add new etype which generates the Renesas R-Car Gen4 SA0 header. This header is placed at the beginning of SPI NOR and describes where should data from SPI NOR offset 0x40000 be loaded to, and how much data should be loaded there. In case of U-Boot, this is used to load SPL and possibly other payload(s) into RT-VRAM. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10arm64: dts: renesas: Clean up sysinfo EEPROM DT description on R-Car Gen3Marek Vasut
Most of the sysinfo EEPROM node eeprom@50 is now part of the core DTs, remove duplicate DT properties from *-u-boot.dtsi . Adjust the phandle reference to i2c-eeprom in sysinfo node using <&{i2c_*/eeprom@50}> to avoid need for DT label. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10arm: renesas: configs: Drop deprecated commentsMarek Vasut
Remove various deprecated code comments, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10net: sh_eth: arm: renesas: README: Drop CFG_SH_ETHER_PHY_MODEMarek Vasut
Drop CFG_SH_ETHER_PHY_MODE from configuration files, this value is never used. No functional change intended. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10net: sh_eth: arm: renesas: README: Drop CFG_SH_ETHER_PHY_ADDRMarek Vasut
Drop CFG_SH_ETHER_PHY_ADDR from README and configuration files, this value is never used, PHY address is extracted from control DT instead. No functional change intended. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10net: sh_eth: Drop phy_addr assignmentMarek Vasut
Drop unused struct sh_eth_info *port_info .phy_addr member assignment. PHY address is extracted from control DT. No functional change intended. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10net: sh_eth: arm: renesas: README: Drop CFG_SH_ETHER_CACHE_*Marek Vasut
Drop CFG_SH_ETHER_CACHE_WRITEBACK and CFG_SH_ETHER_CACHE_INVALIDATE, which are now always enabled in the sh_eth driver, because those cache operations are always available. On architectures which do not implement cache operations yet, cache operations have to be implemented first. CFG_SH_ETHER_ALIGNE_SIZE now set as SH_ETHER_ALIGN_SIZE in sh_eth.h based on architecture and no longer configured on board level. Remove CFG_SH_ETHER_CACHE_WRITEBACK configuration option from README. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10net: sh_eth: Convert cache operations to static functionsMarek Vasut
Turn the current cache operation macros into static functions to improve compiler coverage checking. This does change the driver behavior slightly, the driver now expects those cache operation functions to be available on all architectures on which it is used. This should pose no problem, as the driver is only used on 32bit and 64bit ARM, which both have those operations. The CFG_SH_ETHER_ALIGNE_SIZE is converted to SH_ETHER_ALIGN_SIZE and defined as either 64 on ARM or 16 on SH. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10net: sh_eth: arm: renesas: README: Drop CFG_SH_ETHER_USE_PORTMarek Vasut
The CFG_SH_ETHER_USE_PORT configuration option is a remnant from before U-Boot DM existed and SH Ethernet made full use of it, and is no longer used, remove it. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10net: sh_eth: Pass struct port_info aroundMarek Vasut
The struct sh_eth_dev .port member is always set to 0, therefore only single-ported SH Ethernet is ever used. Support for multiple SH Ethernet ports implemented on driver level is a remnant from before U-Boot DM existed. Pass struct sh_eth_info port_info around directly and remove the struct sh_eth_dev entirely. Handling of multiple ports should be done by U-Boot DM and multiple per-driver-instance private data. No functional change intended. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10arm64: renesas: Add Renesas R-Car Gen4 SCIF/HSCIF loader SREC generationMarek Vasut
Add Renesas R-Car Gen4 SCIF/HSCIF loader compatible SREC generation. This is a regular U-Boot SPL SREC augmented with a short header which describes where to store the received data and how much data to store. This header is interpreted by the R-Car Gen4 BootROM SCIF/HSCIF loader. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-10arm64: renesas: Convert SCIF SREC from u-boot-spl.binMarek Vasut
Convert u-boot-spl.bin instead of u-boot-spl ELF into SCIF loader compatible SREC. The u-boot-spl.bin includes SPL DT, while the ELF does not, which leads to failure to start SPL via SCIF loader due to missing SPL DT. Fix this by using u-boot-spl.bin which includes the DT. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-07-09lmb: add missing fallthrough in lmb_alloc_mem()Heinrich Schuchardt
Add fallthrough to clarify the intent. Addresses-Coverity-ID: CID 569481: Control flow issues (MISSING_BREAK) Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-07-09cmd: Remove "universe" command.Tom Rini
We have had no platforms that make use of this since 2015, so drop it. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-09cmd: Remove "tsi148" commandTom Rini
We have had no platforms that make use of this since 2021, so drop it. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-09dma: Remove lpc32x_dma driverTom Rini
This driver has no users after we removed the last supported platform in 2024. Fixes: 26ed58b40f58 ("arm: Remove devkit3250 board") Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-09gpio: Remove tca642x supportTom Rini
This driver has no users after we removed the last supported platform in 2023. Fixes: 7a3ee61f5551 ("arm: Remove omap5_uevm board") Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-09binman: migrate from pkg_resources to importlibYannic Moog
pkg_resources is deprecated, use migration guide in [1] to migrate to importlib.resources. Keep the Python 3.6 backwards compatibility. This also fixes the binman version test which failed for setuptools versions that print the deprecation warning. Change from __name__ to __package__ as with the transition from pkg_resources to importlib_resources using __name__ results in TypeErrors [2]. [1] https://importlib-resources.readthedocs.io/en/latest/migration.html [2] https://github.com/python/importlib_resources/issues/60 Reviewed-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Yannic Moog <y.moog@phytec.de>
2025-07-09Merge patch series "board: ti: am33xx: Add Ethernet support for Beaglebone ↵Tom Rini
Green Eco" Romain Gantois <romain.gantois@bootlin.com> says: This is version one of my series which enables Ethernet support on the BBGE board. This requires three main changes: - Describing the MAC<->PHY link and DP83867 PHY accurately in the device tree - Enabling the RGMII1 pinmux configuration - Enabling the DP83867 driver These changes are all applied in patch 2. Patch 1 enables excluding the DP83867 driver from SPL. This is done to avoid size issues when adding the DP83867 driver to the am335x-evm defconfig. Link: https://lore.kernel.org/r/20250626-bbge-ethernet-v1-0-5b544fb1898f@bootlin.com
2025-07-09board: ti: am33xx: Add Ethernet support for Beaglebone Green EcoRomain Gantois
Currently, the Ethernet interface of the BBGE board isn't properly supported. To support this interface, describe the MAC<->PHY RGMII link and the DP83867 PHY in the BBGE device tree. Enable the DP83867 PHY driver in U-Boot Proper and mux the relevant RGMII lines. Signed-off-by: Romain Gantois <romain.gantois@bootlin.com> Tested-by: Judith Mendez <jm@ti.com>
2025-07-09net: phy: dp83867: Allow excluding driver from SPLRomain Gantois
The DP83867 PHY driver is used by the BeagleBoneGreen Eco board, but adding it to the am335x-evm defconfig causes SPL to overflow its size limits. Add a separate option to enable this driver in SPL, so that it can be enabled in U-Boot without adding unnecessary volume to SPL. Signed-off-by: Romain Gantois <romain.gantois@bootlin.com> Tested-by: Judith Mendez <jm@ti.com>
2025-07-09Merge patch series "Improve Verdin AM62P thermal setup by generalizing ↵Tom Rini
ft_board_setup_ex()" João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com> says: In some use cases, board-specific device tree changes must not be overwritten by system fixups. Although U-Boot provides ft_board_setup_ex() for this purpose, it is currently only used on TI Keystone. This series makes ft_board_setup_ex() a generic option, allowing its use by other architectures and boards. Additionally, considering that Toradex Verdin-AM62P hardware lifetime guarantees are based on a 105°C junction temperature (while TI AM62Px supports up to 125°C), this series implements necessary changes within TI K3 AM62P and Toradex board code. These changes include exporting common fixup device Tree functions used in TI K3 for board-code access and also fixup for AM62P thermal zones to correctly reflect the number of CPU nodes according to the SoC part number. Link: https://lore.kernel.org/r/20250623-am62p-fdt-fixup-trip-points-v1-0-12355eb6a72f@toradex.com
2025-07-09board: toradex: verdin-am62p: Add fixup for critical trip pointsJoão Paulo Gonçalves
While TI AM62P supports up to 125°C junction temperature, Tj, for industrial and automotive parts, Toradex Verdin-AM62P hardware lifetime guarantees consider a 105°C Tj. Fixup the device tree temperature critical trip points to match the hardware specifications. The implementation ensures the architecture code will not overwrite the board specific changes by enabling CONFIG_OF_BOARD_SETUP_EXTENDED for the Verdin-AM62P. Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2025-07-09arm: mach-k3: am62p: fixup thermal cooling device by cpu numberJoão Paulo Gonçalves
TI AM62Px devices support CPU throttling based on thermal alerts. However, the device tree assumes a 4-core configuration. Since the AM62P also supports 2-core configurations, add a fixup to dynamically adjust the cooling-device nodes within thermal zones based on the actual number of CPU cores available. Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
2025-07-09arm: mach-k3: Export common fdt fixups for use in board codeJoão Paulo Gonçalves
Avoid code duplication by making the common TI K3 device tree fixup functions to be reusable by board-specific code. Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
2025-07-09boot: Make ft_board_setup_ex() genericJoão Paulo Gonçalves
In some use cases, board-specific device tree changes must not be overwritten by system fixups. Although U-Boot provides ft_board_setup_ex() for this purpose, it is currently only used on TI Keystone. Make ft_board_setup_ex() to be a generic option, allowing its use by other architectures/boards. To maintain backward compatibility, enable it by default on TI Keystone. Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
2025-07-08boot: menu: Do not dereference pointer if pointer is NULLAndrew Goodbody
scene_obj_find can return NULL but this is not checked for before the return is dereferenced. Add a NULL check. This issue was found by Smatch. Also add a NULL check for str. Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-07-08boot: pxe: Prevent evaluation of uninitialised variableAndrew Goodbody
In the case where parse_sliteral returns an error then label_name will not have been assigned to. In order to prevent evaluating label_name in this case add a check for the return value of parse_sliteral. Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-08env: Fix possible out-of-bound access in env_do_env_setChristian Marangi
It was discovered that env_do_env_set() currently suffer from a long time of a possible out-of-bound access for the argv array handling. The BUG is present in the function env_do_env_set() line: name = argv[1]; where the function at this point assume the argv at index 1 is always present and can't be NULL. Aside from the fact that it's always better to validate argv entry with the argc variable, situation where the argv[1] is NULL is actually possible and not an error condition. A example of where an out-of-bound access is triggered is with the command "askenv - Press ENTER to ...". This is a common pattern for bootmenu entry to ask the user input after a bootmenu command succeeded. In the context of such command, the while loop before "name = argv[1];" parse the "-" char as an option arg and increment the argv pointer by one (to make the rest of the logic code ignore the option argv) and decrement argc value. The while loop logic is correct but at the "name = argv[1];" line, the argv have only one element left (the "-" char) and accessing argv[1] (aka the secong element from argv pointer) cause an out-of-bound access (making the bootloader eventually crash with strchr searching in invalid data) To better handle this and prevent the out-of-bound access, actually check the argv entry left (with the use of the argc variable) and exit early before doing any kind of array access. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-07-08fit-dtb.blob.gz: Pass "-n" to gzipTom Rini
Sometimes when building a platform such as imx28_btt3 we can get an error such as: gzip: fit-dtb.blob: warning: file timestamp out of range for gzip format make[1]: *** [Makefile:1219: fit-dtb.blob.gz] Error 2 make[1]: *** Deleting file 'fit-dtb.blob.gz' make: *** [Makefile:186: sub-make] Error 2 This is typically resolved by telling gzip to ignore the timestamp. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-08tools: termios_linux.h: Fix build error on ppc64Javier Martinez Canillas
Commit 93b55636b09f ("tools: kwboot: Allow any baudrate on Linux") added a tcgetattr() function to be used, instead of the libc's termios functions. This was done to allow using the raw TCGETS2/TCSETS2 ioctls that allow to support arbitrary baud rates. This breaks the build for PowerPC, because that architecture does not have a struct termios2 defined because the termios and ktermios are the same. On PowerPC, the termios ioctl() emulates the TCGETS2/TCSETS*2 ioctls with tcgetattr/tcsetattr using just the struct termios (that's as mentioned the same than what is defined as struct termios2 in other architectures). So there is no need to use the TCGETS2/TCSETS2 ioctls on that architecture and just TCGETS/TCSETS ioctls with termios as defined by PowerPC is enough. Fixes: 93b55636b09f ("tools: kwboot: Allow any baudrate on Linux") Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-07-08pci_endpoint: pci_cdns_ti_ep: Fix the include path for header fileHrushikesh Salunke
The commit under fixes tag includes "pcie-cadence.h" using angle brackets. Since the header file is not in standard include path change it to double quotes to ensure proper inclusion and avoid build issues, especially on older compilers. Fixes: a4a0edc6046 ("pci_endpoint: Add TI K3 Cadence PCIe Endpoint Controller driver") Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com>
2025-07-08board: phytec: rm-cfg: Update rm-cfg to reflect new resource reservationWadim Egorov
With the latest TIFS firmware, an additional virtual interrupt and event is reserved for TIFS usage on am62x and am62ax devices. Update the rm-cfg to reflect this new reservation. Based on commit 87720385ab69 ("board: ti: rm-cfg: Update rm-cfg to reflect new resource reservation"). Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-07-08Makefile: Fix of_list_dirs with EXT_DTBManorit Chawdhry
EXT_DTB overrides the of_list_dirs that is passed to binman during builds. This causes binman to not find the normal DTB paths and instead it just is able to use the path for EXT_DTB only. Add the default of_list_dirs that is used for normal binman builds to EXT_DTB usecase as well. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Aniket Limaye <a-limaye@ti.com>
2025-07-08lib/rsa: allow matching pkcs11 path by object idTobias Olausson
The object= part matches against the label that the pkcs11 token uses for that object, but in some cases, specifically with a Yubikey using ykcs11, where the keys have been imported, the labels differ between the private and public keys [1], making the object= matching useless. These keys will have the same id however, so matching against that works for both the private and public part. [1]: https://github.com/Yubico/yubico-piv-tool/blob/master/doc/YKCS11/Functions_and_values.adoc#key-alias-per-slot-and-object-type Signed-off-by: Tobias Olausson <tobias@eub.se>
2025-07-08common: readline: Fix always true testAndrew Goodbody
The variable base is unsigned so >= 0 is always true. Fix this test so that it is actually useful. The fix prevents the code from causing a segfault in the case where Ctrl-w is pressed on a line consisting only of spaces. Fixes: dcc18ce0dbaf ("cli: Implement delete-word in cread_line()") Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-08Merge patch series "include/ndisc.h: Audit include list"Tom Rini
This series from myself largely completes an audit of extraneous include directives in 'include/*.h' and does not go in to other directories. Link: https://lore.kernel.org/r/20250628224352.85694-1-trini@konsulko.com
2025-07-08include/vsc9953.h: Audit include listTom Rini
This file does not need <config.h> nor <miiphy.h> so remove them. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-08include/spl_gpio.h: Audit include listTom Rini
This file does not need <asm/gpio.h> so remove it. This file does however need <linux/types.h> so add that in. This also shows that arch/arm/mach-rockchip/rk3399/rk3399.c and board/lg/star/star.c were indirectly getting <asm/gpio.h> from here, so add <asm/gpio.h> to them. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-08include/sata.h: Audit include listTom Rini
This file does not need <part.h> so remove it. This file does however need <stdbool.h> so add that in. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-08include/part.h: Audit include listTom Rini
This file does not need <linker_lists.h> so remove it. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-08include/ndisc.h: Audit include listTom Rini
This file should not include itself, drop that. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-08Merge patch series "kbuild: Update Makefile.extrawarn to 5.1"Tom Rini
This series from Ilias Apalodimas <ilias.apalodimas@linaro.org> largely finishes the re-sync with the Linux Kernel v5.1 kbuild system. Link: https://lore.kernel.org/r/20250627185723.342553-1-ilias.apalodimas@linaro.org
2025-07-08kbuild: Bump the build system to 5.1Ilias Apalodimas
Our last sync with the kernel was 5.1. Even that was a partial one as some patches from 4.x kernels were already missing making the transition to a modern kbuild infeasible. We are so out of sync now, that tracking the patches and backporting them one by one makes little sense and it's going to take ages. This is an attempt to sync up Makefile[.lib/.kbuild]. Unfortunately due to sheer amount of patches this is not easy to review, but that's what we decided during a community call. One of the biggest changes is get rid of partial linking entirely and build .a archives isntead of .o. We diaviate from the kernel on that. Instead of calling a custom script to create the archive symbol table, we call ar with rcTP (isntead of rcSTP) since we want a resulting archive that's sauble with the linker. The only affected platforms are PPC ones. Unfortunately I don't have any of them around to test, but the objdump of the resulting files -- arch/powerpc/lib/built-in.[oa] looks identical. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-07-08kbuild: Update Makefile.extrawarn to 5.1Ilias Apalodimas
Since we are updating our kbuild system to 5.1, add the relevant clang changes from upstream Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-07-08Merge tag 'xilinx-for-v2025.10-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze AMD/Xilinx changes for v2025.10-rc1 cmd: - Introduce CMD_HELP Kconfig option fpga: - Fix in intel_smd_mb mini: - Remove simple-bus driver and description - Disable CMD_HELP firmware: - Fix dependencies - Switch to new SMC firmware format cadence qspi: - Fix read/write STIG mode - Set tshsl_ns to at least one sclk_ns sdhci: - Call sdhci reset if wired zynqmp-clk: - Add support for DPLL clock source zynqmp: - Sync clock ID bindings with Linux - defconfig updates - Enable rng-seed generation versal: - Fix clock dependency versal2: - defconfig updates - Enable sysreset # -----BEGIN PGP SIGNATURE----- # # iHUEABYIAB0WIQSXAixArPbWpRanWW+rB/7wTvUR9QUCaG0Z7AAKCRCrB/7wTvUR # 9YyCAQCseYDzYZbdh4e2g6LirVovzPv2LUNRFInYSKleegOjiwEAgQ0p9wZ0hNNj # TpWf6sOKa/0ad3bZBtvbuV0G9WpqWAA= # =2pbC # -----END PGP SIGNATURE----- # gpg: Signature made Tue 08 Jul 2025 07:15:24 AM CST # gpg: using EDDSA key 97022C40ACF6D6A516A7596FAB07FEF04EF511F5 # gpg: Can't check signature: No public key
2025-07-08Merge tag 'net-next-20250708' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-net Pull request net-next-20250708 lwip: - Call sys_check_timeouts() and schedule() on RX to fix an issue on boards with a watchdog and simplify the code - Enable IP_FRAG and IP_REASSEMBLY - Add support for setting the TFTP blocksize at runtime - Fix DNS initialization in wget - Add the sntp command - Move code from net/lwip/${cmd}.c to cmd/lwip/${cmd}.c
2025-07-08arm64: versal2: Remove the ZynqMP Firmware from mini ospiVenkatesh Yadav Abbarapu
Remove the config ZYNQMP_FIRMWARE and also update the initial stack address. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250707092102.831697-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-07-08cadence_qspi: fix odd byte read issue in STIG modeVenkatesh Yadav Abbarapu
In DDR mode, even bytes are read using DMA, while the remaining odd bytes are read using STIG mode. However, the data is not correctly transferred into the flash read data lower register because the supplementary byte of the STIG opcode is not being written to the opcode extension register, resulting in incorrect data being read. To resolve this issue, when using STIG transactions, the corresponding supplementary byte of any STIG opcode must be defined in the Opcode Extension Register (Lower). Issue has been observed on the Macronix MX66UM2G45G flashes. Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250702053953.640046-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-07-08spi: cadence_qspi: Set tshsl_ns to at least one sclk_nsVenkatesh Yadav Abbarapu
tshsl_ns is the clock delay for chip select deassert. This is the delay in master reference clocks for the length that the master mode chip select outputs are de-asserted between transactions. The minimum delay is always SCLK period to ensure the chip select is never re-asserted within one SCLK period. That is why tshsl_ns delay should be at least one sclk_ns value. If it is less than sclk_ns, set it equal to sclk_ns. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250702065717.3871435-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>