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We want to record the type of each file which is loaded. Add an new
parameter for this, to the read_file() method. Update all users.
Make bootmeth_common_read_file() store information about the image that
is read.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
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The efiload_read_file() does similar things to a common function, so
update it to use that instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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This function is exported, so document it in the header file. Drop the
duplicate comment in the C file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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As a first step to recording images and where they came from, update
this function to do so, since it is used by two bootmeths
Create a helper function in the bootflow system, since recorded
images are always associated with bootflows.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We want to keep track of images which are loaded, or those which could
perhaps be loaded. This will make it easier to manage memory allocation,
as well as permit removal of the EFI set_efi_bootdev() feature.
Add a list of these, attached to the bootflow. For now the list is
empty.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Use an alist for this data structure as it is somewhat simpler to
manage. This means that bootstd holds a simple list of bootflow structs
and can drop it at will, without chasing down lists.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This list is only used by two functions, which can be updated to iterate
through the global list. Take this approach, which allows the bootdev
list to be dropped.
Overall this makes the code slightly more complicated, but will allow
moving the bootflow list into an alist
Signed-off-by: Simon Glass <sjg@chromium.org>
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Provide a function which is safe to call in the 'unbind' path, which
returns the bootstd priv data if available.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This relates to more than just the bootdev, since there is a global list
of bootflows. Move the function to the bootstd file and rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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This relates to more than just the bootdev, since there is a global list
of bootflows. Move the function to the bootstd file and rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Aparna Patra <a-patra@ti.com> says:
This series implements fdt fixups, by reading hardware
information from registers and accordingly delete/modify
the DT nodes, at run-time.
Logs for AM62P boot:
https://gist.github.com/itsme-aparna/b889fe59882c1acf0ef25a644bd325c4
Link: https://lore.kernel.org/r/20250108044939.392785-1-a-patra@ti.com
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The maximum frequency of the A53 CPU on the AM62P depends on the speed
grade of the SoC. This value is hardcoded in the DT for all AM62P
variants, potentially causing specifications to be exceeded. Moreover,
setting a common lower frequency for all variants increases boot time.
To prevent these issues, modify the DT at runtime from the R5 core to
adjust the A53 CPU frequency.
Signed-off-by: Aparna Patra <a-patra@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
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AM62P SoC has multiple speed grades. Add function to delete
non-relevant CPU frequency nodes, based on the information
retrieved from hardware registers. Fastest grade's maximum
frequency also depends on PMIC voltage, hence to simplify
implementation use the smaller value.
Signed-off-by: Aparna Patra <a-patra@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
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Read the max temperature for the SoC temperature grade from the hardware
and modify the critical trip nodes on each thermal zone of FDT at
runtime so they are correct with the hardware value for its grade.
Signed-off-by: Aparna Patra <a-patra@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
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AM62P SOC is available in multiple variants:
-CPU cores (Cortex-A) AM62Px1 (1 core),
AM62Px2 (2 cores), AM62Px4 (4 cores)
-With and without CAN-FD & Video-codec support
Remove the relevant FDT nodes by reading the actual configuration
from the SoC registers, with that change it is possible to have a single
dts/dtb file handling the different variant at runtime.
Signed-off-by: Aparna Patra <a-patra@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
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Santhosh Kumar K <s-k6@ti.com> says:
Hello,
This series adds support for Inline ECC in DDR for AM64X, AM62X,
AM62AX, AM62PX, J721E, J721S2, J722S and J784S4 devices.
Test Results: https://gist.github.com/santhosh21/88de920771ed2efa0463a5a367cb8d7b
Link: https://lore.kernel.org/r/20250106090708.1541212-1-s-k6@ti.com
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size when ECC is enabled
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is enabled.
Otherwise, fixup the device tree using the regular
fdt_fixup_memory_banks().
Also call dram_init_banksize() after every call to
fixup_ddr_driver_for_ecc() is made so that gd->bd is populated
correctly.
Ensure that fixup_ddr_driver_for_ecc() is agnostic to the number of DDR
controllers present.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
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Set CONFIG_NR_DRAM_BANKS to 2 as we have two banks described in the
memory/ node for lower and higher addressible DDR regions.
This allows use of FDT functions from fdt_support.c to set up and fix up
the memory/ node correctly.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
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The functionality of enabling Inline ECC is now controlled by
CONFIG_K3_INLINE_ECC. So, remove the support for 'ti,ecc-enable'
property to avoid redundancy and to ensure the Inline ECC feature is
mananged through build-time config.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
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Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
only when the config has been enabled.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
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Enable ECC 1-bit error, 2-bit error, multiple 1-bit error interrupts
by setting the respective bits in the DDRSS_V2A_INT_SET_REG register.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
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Setup the ECC region's start and range using the device private data,
ddrss->ddr_bank_base[0] and ddrss->ddr_ram_size. Also, move start and
range of ECC regions from 32 bits to 64 bits to accommodate for
DDR greater than or equal to 4GB.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
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restricted to 32 bits' issue
As R5 is a 32 bit processor, the RAM banks' base and size calculation
is restricted to 32 bits, which results in wrong values if bank's base
is greater than 32 bits or bank's size is greater than or equal to 4GB.
So, add k3_ddrss_ddr_bank_base_size_calc() to get the base address and
size of RAM's banks from the device tree memory node, and store in a
64 bit device private data which can be used for ECC reserved memory
calculation, Setting ECC range and Fixing up bank size in device tree
when ECC is enabled.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
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The 1-bit inline ECC support in TI's DDRSS bridge requires
the configured memory regions to be preloaded with a pattern
before use. This is done by the k3-ddrss driver from the
R5 SPL in a 'for' loop. It takes around 10 seconds to fill
2GB of memory, for example. Memset can cut the time in half
and using DMA currently yields a similar result.
The BIST engine of DDR controller provides support for
initializing any memory region with a pattern. This
bypasses the DDRSS bridge, so the required inline ECC
data is not computed and populated in the memory. For
some values like zero, the computed ECC syndrome is also
zero and we can use these values to preload the memory
from the DDR controller, without the assistance of the
bridge.
The registers involved in the process are described in the
'DDR controller registers' topic in [1] AM62 and [2] J721E
reference manuals.
The patch replaces the 'for' loop memory fill function with
the BIST memory initialization procedure. This cuts the time
to preload the 2GB memory from 10 seconds down to 1 second.
The bist preload function uses the lpddr4 APIs in the k3-ddrss,
so this is compatible with devices with both 16-bit LPDDR4 and
32-bit LPDDR4 interfaces (e.g J721E).
[1] AM62x: https://www.ti.com/lit/pdf/spruiv7
[2] DRA829/TDA4VM: https://www.ti.com/lit/zip/spruil1
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
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Add ss_cfg memory region which maps the DDRSS configuration region
for the memory controller node.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Neha Malcom Francis <n-francis@ti.com>
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flexibility"
Dmitry Rokosov <ddrokosov@salutedevices.com> says:
This series consists of three patches.
The first patch modifies the function documentation style in the
include/fdt_support.h file to comply with kernel-doc requirements.
The second patch modifies the board_fdt_chosen_bootargs() function to
return a const char* type. This change clarifies to the caller that the
returned string should neither be freed nor modified. It aligns with the
existing fdt_setprop() function, which already utilizes a const char*
parameter. This promotes consistency within the codebase and enhances
code safety by preventing unintended modifications to the returned
string.
The third patch addresses the need for flexibility in providing kernel
command line arguments (bootargs) for different kernel images within the
same U-Boot environment. It introduces a read-only (RO) fdt_property
argument to the board_fdt_chosen_bootargs() function, allowing access to
the original chosen/bootargs data. This is crucial for scenarios where
different kernel versions require distinct console setups (e.g., ttyS0
for vendor kernels and ttyAML0 for upstream kernels). By enabling board
developers to either merge or replace the original bootargs, this
patch enhances the configurability of U-Boot for various kernel
images without relying on outdated configurations like CMDLINE_EXTEND.
CI/CD results: https://github.com/u-boot/u-boot/pull/716/checks
Link: https://lore.kernel.org/r/20241220-board_fdt_chosen_bootargs_improvements-v1-0-f6a7181787c5@salutedevices.com
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Sometimes, it is necessary to provide an additional bootargs string to
the kernel command line.
We have a real scenario where one U-Boot blob needs to boot several
kernel images: the vendor-patched kernel image and the latest upstream
kernel image. The Amlogic (Meson architecture) tty driver has different
tty suffixes in these kernels: the vendor uses 'ttySx', while the
upstream implementation uses 'ttyAMLx'. The initial console setup is
provided to the kernel using the kernel command line (bootargs). For the
vendor kernel, we should use 'console=ttyS0,115200', while for the
upstream kernel, it must be 'console=ttyAML0,115200'. This means we have
to use different command line strings depending on the kernel version.
To resolve this issue, we cannot use the CMDLINE_EXTEND kernel
configuration because it is considered legacy and is not supported for
the arm64 architecture. CMDLINE_EXTEND is outdated primarily because we
can provide additional command line strings through the
'chosen/bootargs' FDT node. However, U-Boot uses this node to inject the
U-Boot bootargs environment variable content, which results in U-Boot
silently overriding all data in the 'chosen/bootargs' node. While we do
have the board_fdt_chosen_bootargs() board hook to address such issues,
this function lacks any FDT context, such as the original value of the
'chosen/bootargs' node.
This patch introduces a read-only (RO) fdt_property argument to
board_fdt_chosen_bootargs() to share the original 'chosen/bootargs' data
with the board code. Consequently, the board developer can decide how to
handle this information for their board setup: whether to drop it or
merge it with the bootargs environment.
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
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It should be structured this way to demonstrate to the caller that
freeing the return value is unnecessary and that the caller cannot
modify it.
The function fdt_setprop() includes a parameter with a const char*
prototype, so it is better to use the const qualifier.
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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No errors from kernel-doc with this patch applied:
$ ./scripts/kernel-doc -v -none include/fdt_support.h
include/fdt_support.h:17: info: Scanning doc for arch_fixup_fdt
include/fdt_support.h:37: info: Scanning doc for fdt_root
include/fdt_support.h:48: info: Scanning doc for fdt_chosen
include/fdt_support.h:59: info: Scanning doc for fdt_initrd
include/fdt_support.h:100: info: Scanning doc for fdt_fixup_memory
include/fdt_support.h:115: info: Scanning doc for fdt_fixup_memory_banks
include/fdt_support.h:148: info: Scanning doc for fdt_fixup_display
include/fdt_support.h:176: info: Scanning doc for fdt_record_loadable
include/fdt_support.h:205: info: Scanning doc for ft_board_setup
include/fdt_support.h:218: info: Scanning doc for board_rng_seed
include/fdt_support.h:231: info: Scanning doc for board_fdt_chosen_bootargs
include/fdt_support.h:251: info: Scanning doc for ft_system_setup
include/fdt_support.h:266: info: Scanning doc for fdt_shrink_to_minimum
include/fdt_support.h:301: info: Scanning doc for fdt_copy_fixed_partitions
include/fdt_support.h:314: info: Scanning doc for fdt_translate_address
include/fdt_support.h:327: info: Scanning doc for fdt_translate_dma_address
include/fdt_support.h:342: info: Scanning doc for fdt_get_dma_range
include/fdt_support.h:464: info: Scanning doc for fdt_get_cells_len
include/fdt_support.h:480: info: Scanning doc for fdtdec_get_child_count
include/fdt_support.h:500: info: Scanning doc for fdt_kaslrseed
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Reading doc/board/google/chromebook_coral.rst we can see that at some
point it was intended to put the bloblist in CAR, rather than DRAM, at
some point during development. This is fine for TPL/SPL stages where we
have very minimal information stored in the bloblist and so we can set
the limit there to 4KiB and then expand it to 196KiB in U-Boot proper so
there's room for ACPI tables and so forth. We also update the
documentation to use the same location for CONFIG_BLOBLIST_ADDR in both
references.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Raymond Mao <raymond.mao@linaro.org> says:
Motivations for changes:
Current SMBIOS library and command-line tool is not fully matching with
the requirements:
1. Missing support for other mandatory types (#7, #9, #16, #17, #19).
2. Only a few platforms support SMBIOS node from the device tree.
3. Values of some fields are hardcoded in the library other than fetching
from the device hardware.
4. Embedded data with dynamic length is not supported (E.g. Contained
Object Handles in Type #2 and Contained Elements in Type #3)
Changes:
1. Refactor the SMBIOS library and command-line tool to better align with
the SMBIOS spec.
2. Create an arch-specific driver for all aarch64-based platforms to fetch
SMBIOS private data from the device hardware (processor and cache).
3. Create a sysinfo driver to poppulate platform SMBIOS private data.
4. Add generic SMBIOS DTS file for arm64 platforms for those common strings
and values which cannot be retrieved from the system registers.
Vendors can create their own SMBIOS node using this as an example.
For those boards without SMBIOS nodes, this DTS file can be included to
have a generic SMBIOS information of the system.
5. Add support for Type #7 (Cache Information) and link its handles to
Type #4.
6. To minimize size-growth for those platforms which have not sufficient
ROM spaces or the platforms which don't need detailed SMBIOS
information, new added fields are only being built when kconfig
GENERATE_SMBIOS_TABLE_VERBOSE is selected.
Once this patch is acceptted, subsequent patch sets will add other missing
types (#9, #16, #17, #19).
Tests:
To test this with QEMU arm64, please follow the guide on dt_qemu.rst to
get a merged DT to run with.
```
qemu-system-aarch64 -machine virt -machine dumpdtb=qemu.dtb
cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb ./dts/dt.dtb | grep -v /dts-v1/) \
| dtc - -o merged.dtb
qemu-system-aarch64 -machine virt -nographic -bios u-boot.bin \
-dtb merged.dtb
```
Link: https://lore.kernel.org/r/20241206225438.13866-1-raymond.mao@linaro.org
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Enable sysinfo smbios by default for arm64.
When SYSINFO_SMBIOS is enabled, disable QFW_SMBIOS.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Update the cmd according to the changes of the smbios library:
1. Refactor smbios cmd print functions to match the content defined
by the specification.
2. Add new print functions for Type 3, 4 and 7.
3. Remove the fallback string "Not specified" from smbios_get_string,
as the spec requires a NULL output for those undefined strings.
4. Update the test_cmd_smbios_sandbox pytest expected result to
align with the smbios library changes and add new pytest
test_cmd_smbios_sysinfo_verbose to test the verbose smbios
output.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
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Add common smbios information that can be used by all armv8
platforms and set it as default for qemu-arm64.
>From now smbios library can load values from here for those fields
doesn't exist in the sysinfo driver.
To run this with QEMU arm64, we need to dump the generated DTB
from QEMU first, merge it with the one we build and then re-run
QEMU with the merged DTB.
```
qemu-system-aarch64 -machine virt -machine dumpdtb=qemu.dtb
cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb ./dts/dt.dtb | \
grep -v /dts-v1/) | dtc - -o merged.dtb
qemu-system-aarch64 -machine virt -nographic -bios u-boot.bin \
-dtb merged.dtb
```
For details please take reference on dt_qemu.rst
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
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Add sysinfo platform driver for all armv8 platforms to retrieve
hardware information on processor and cache.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Add detailed SMBIOS information as following:
1. Missing fields in Type #3 and #4
2. Type #7
Add support to dynamic length of contained object handles and
elements.
As SMBIOS is a fundamental feature which is enabled for all
boards, in order to avoid increasing rom size, all detailed SMBIOS
information is under kconfig GENERATE_SMBIOS_TABLE_VERBOSE.
Board maintainers can determine whether to select this feature.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
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Current smbios library does not fully match to the specification.
It hardcodes values instead of exposing values from the device.
It does not reserve the space to support dynamic length for
contained object handles or elements and misses the handling of
a few of fields.
The refactoring of this patch includes:
1. Expose values from device via sysinfo interface.
2. Replace smbios_add_prop with smbios_add_prop_si to allow getting
string values from sysinfo.
3. Add smbios_get_val_si to get values from sysinfo or device tree.
4. Use sysinfo_get_data to get data area.
5. Reserve the space of contained object handles and elements.
6. Miscellaneous fixes in smbios.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
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Add sysinfo driver to retrieve smbios information (Type 4 and 7).
So that the smbios library can use it for getting values from the
hardware platform instead of device tree.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
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Adding sysinfo_get_data into sandbox ut test dm_test_sysinfo.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
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Add interface for sysinfo to access a data area from the platform.
This is useful to save/read a memory region of platform-specific
data.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
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Move the smbios field definitions to a separated simple headfile,
which is a prerequisite to be included by dts files.
Add new definitions for cache information.
This patch also includes a few of code optimizations in smbios.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Simon Glass <sjg@chromium.org> says:
This little series makes a minor change to how autoprobe is
implemented, as discussed on the list.
Link: https://lore.kernel.org/r/20240626235717.272219-1-marex@denx.de
Link: https://lore.kernel.org/r/20241120153642.861633-1-sjg@chromium.org
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Rather than doing autoprobe within the driver model code, move it out to
the board-init code. This makes it clear that it is a separate step from
binding devices.
For now this is always done twice, before and after relocation, but we
should discuss whether it might be possible to drop the post-relocation
probe.
For boards with SPL, the autoprobe is still done there as well.
Note that with this change, autoprobe happens after the
EVT_DM_POST_INIT_R/F events are sent, rather than before.
Link: https://lore.kernel.org/u-boot/20240626235717.272219-1-marex@denx.de/
Signed-off-by: Simon Glass <sjg@chromium.org>
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There is no point in checking the pre_reloc flag, since devices not
marked as pre-reloc will not have been bound, so won't exist yet.
There doesn't seem to be any point in checking if the device has a
valid devicetree node either, so drop that too.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This is enabled by all boards, so drop the condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx changes for v2025.04-rc1 v2
Versal:
- Enable dfu support for SPI with multiboot
ZynqMP:
- Align multiboot reg description
- DT syncups
- Wire missing DTs in defconfig
- Kria: Remove usb hub initialization via commands
- Kria: Update DP reset in psu_init
AMD/Xilinx:
- Enable SPI_STACKED_PARALLEL configs
SPI/ZYNQMP_GQSPI:
- Update debug message to use log_debug()
RTC:
- Enable ZYNQMP_RTC for Versal SOCs
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Allow the ZyncMP RTC driver to be enabled on Versal architectures.
Also, require DM_RTC since the driver uses the RTC driver model.
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Link: https://lore.kernel.org/r/20250114135812.2605618-1-vfazio@xes-inc.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Update recent parallel memory support code to move to log_debug instead
of debug as per logging in U-Boot documentation
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
Link: https://lore.kernel.org/r/20250107145110.2855213-1-ibai.erkiaga-elorza@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Add missing prototype to fix the sparse warning,
warning: no previous prototype for 'set_dfu_alt_info'
[-Wmissing-prototypes].
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250106090630.209938-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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