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2022-05-24xilinx: zynqmp: Wire tee for Multi DTB use casesMichal Simek
Fix TEE wiring when MULTI_DTB is selected. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c8523a89d910ae6b8a9971b4e7b3bda89be3dc27.1652874088.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Add DT description for si5328 for zcu102/zcu106Michal Simek
Origin DT binding just specify driver but wasn't aligned with DT binding which came later. Extend description for zcu102 and zcu106 to cover latest binding. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/db66a4bb501183ffbd033da4dd263afdb214f8ec.1652262769.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Add linux,code for fwuen buttonMichal Simek
BTN_MISC looks like the most reasonable option for this button. Button is used by firmware to indicate (after reset, power up) that user wants to do firmware upgrade via firmware update utility. For bootloader or OS is this just user button which is worth to have it mapped. Also button can be used as a wakeup source and pressing it for more time can generate more chars that's why also adding wakeup-source and autorepeat properties. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://lore.kernel.org/r/7f6d627473632c3c3036ec9f6aaa36e00f4615e2.1652262769.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Add PHY description for SGMII on vck190 SCMichal Simek
SGMII requires phy to be configured. The support for this has been added to Linux and U-Boot already that's why also describe the phy via DT. Clock is coming from si5332 chip (output 1) 125MHz which is only one GT line use on this board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/8ad8d0c2fc9690cc90f95feddf87b0e94a685a43.1652262769.git.michal.simek@amd.com
2022-05-18Revert "arm64: zynqmp: Add zynqmp firmware specific DT nodes"T Karthik Reddy
This reverts commit 50a6bd000f94832658f42fb01b9aaf9e39a52004. As zynqmp mini emmc does not rely on firmware, remove firmware related device tree modes from zynqmp mini emmc dts files. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e69b30d82b0307c563fe72630d9172e53964aeda.1652262769.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Add dmas, gpu, rtc, watchdogs and opp nodes for SOMMichal Simek
There are couple of IPs which are enabled in origin HW design which are missing in SOM dt. Add them to match default setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/901401beacbea5931fc18cde20c157e5978a7023.1652262769.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells propertyVishal Patel
Add pwm-fan node to control fan through hwmon and change pwm-cells property to 3 to allow fancontrol utility to function correctly. Signed-off-by: Vishal Patel <vishal.patel@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/21b4dfce3e45136a468974ea3dedca03320e27b8.1652262769.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Add power domain description for PLMichal Simek
PL has own power domain which is not described in DT. That's why add it there by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b38e2ea95dab434bc007f9ed6c438c68149744bf.1652262769.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Fix opp-table-cpuMichal Simek
OPP table name now should start with "opp-table" and OPP entries shouldn't contain commas and @ signs in accordance to the new schema requirement. The same change was done in Linux by commit c6d4a8977598 ("ARM: tegra: Rename CPU and EMC OPP table device-tree nodes"), commit ffbe853a3f5a ("ARM: dts: sunxi: Fix OPPs node name") or commit b7072cc5704d ("arm64: dts: qcom: qcs404: Rename CPU and CPR OPP tables"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a1176349448df35127dbac15c1eeb2229505bae7.1652262769.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Add gpio labels for modepinMichal Simek
Using labels helps with better identifications of chips. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/15b0f68077fb3c86d438caf8562de87367361c60.1652262769.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Add mode-pin GPIO controller DT nodePiyush Mehta
Add mode-pin GPIO controller DT node in zynqmp.dtsi and also setup default reset-gpios property for usb which is default Xilinx setup. Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f2a1f6f541c41075ea36062857031bfc28d6d303.1652262769.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: zynqmp-sm-k26-revA: Fix DP PLL configurationNeal Frager
This patch fixes the DP audio and video PLL configurations for the zynqmp-sm-k26-revA som. The Linux DP driver expects the DP to be using the following PLL config: - DP video PLL should use the VPLL (0x0) - DP audio PLL should use the RPLL (0x3) - DP system time clock PLL should use RPLL (0x3) Register 0xFD1A0070 configures the DP video PLL. Register 0xFD1A0074 configures the DP audio PLL. Register 0xFD1A007C configures the DP system time clock PLL. Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fa7e9abc419c9d7648405d1c62367dbe701d09b8.1652709736.git.michal.simek@amd.com
2022-05-18phy: zynqmp: Increase timeout value to 10msAshok Reddy Soma
Observing psgtr pll timeouts with some usb hubs and devices behind it. Increase timeout to 10ms to take care of it. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220510131234.2650-1-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-05-18arm64: zynqmp: Set qspi tx-buswidth to 4Amit Kumar Mahapatra
In all the ZynqMP boards dts files tx-buswidth is by default set to 1. Due to this the framework only issues 1-1-1 write commands to the GQSPI driver. But the GQSPI controller is capable of handling 1-4-4 write commands, so updated the tx-buswidth to 4 in ZynqMP boards dts files. This would enable the spi-nor framework to issue 1-4-4 write commands instead of 1-1-1. This will increase the tx data transfer rate, as now the tx data will be transferred on four lines instead on single line. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ad61199f55e5e00f29de6206d9d1872a52a7657e.1652193179.git.michal.simek@amd.com
2022-05-18xilinx: zynqmp: Do not guard SPL_FS_LOAD_PAYLOAD_NAME by SDHCI driverMichal Simek
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME is used by set_dfu_alt_info() for string generation. It doesn't depend on SDHCI because the same file can be stored to other non volatile memories like qspi. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/97434e122c6f8f042330b60d3e8de4c31f3e3f93.1652192580.git.michal.simek@amd.com Link: https://lore.kernel.org/r/718de136c68c9a76fc7b4e536a727f401b05bfb9.1652702625.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: Fix split mode reset functionalityNeal Frager
This patch fixes two issues in the set_r5_reset function. 1. When in split mode, the lpd_amba_rst bit should only be set when both r5 cpu cores are in reset. Otherwise, if one r5 core is still running, setting the lpd_amba_rst bit will cause an error for the running core. The set_r5_reset function has been modified to check if the other r5 core is still running before setting the lpd_amba_rst bit. 2. The cpu_disable function was always assuming that the r5 cores are in split mode when resetting either core 4 or 5. This is incorrect for lockstep functionality. This patch adds a function check_r5_mode to handle the cpu_disable function correctly for the r5 cores by checking the mode and handling the reset appropriately. Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d99cbd7f2394ac055ef27457298f554ff0747ba7.1651648344.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: zynqmp-zcu102-revA: Fix DP PLL configurationNeal Frager
This patch fixes the DP audio and video PLL configurations for the zynqmp-zcu102-revA evaluation board. The Linux DP driver expects the DP to be using the following PLL config: - DP video PLL should use the VPLL (0x0) - DP audio PLL should use the RPLL (0x3) Register 0xFD1A0070 configures the DP video PLL. Register 0xFD1A0074 configures the DP audio PLL. Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b2eb87758e0cd4844e1754da8c58fce58d9cf683.1651740949.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: zynqmp-zcu106-revA: Fix DP PLL configurationNeal Frager
This patch fixes the DP audio and video PLL configurations for the zynqmp-zcu106-revA evaluation board. The Linux DP driver expects the DP to be using the following PLL config: - DP video PLL should use the VPLL (0x0) - DP audio PLL should use the RPLL (0x3) Register 0xFD1A0070 configures the DP video PLL. Register 0xFD1A0074 configures the DP audio PLL. Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/62538b4a04dee28a6fc8ac5b85f8c845a5a76aa4.1651740988.git.michal.simek@amd.com
2022-05-18arm64: zynqmp: zynqmp-zcu106-rev1.0: Fix DP PLL configurationNeal Frager
This patch fixes the DP audio and video PLL configurations for the zynqmp-zcu106-rev1.0 evaluation board. The Linux DP driver expects the DP to be using the following PLL config: - DP video PLL should use the VPLL (0x0) - DP audio PLL should use the RPLL (0x3) Register 0xFD1A0070 configures the DP video PLL. Register 0xFD1A0074 configures the DP audio PLL. Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ae42ad6185418713a473660c8d15903299af7764.1652192319.git.michal.simek@amd.com
2022-05-13mmc: zynq_sdhci: Add weak function prototypeT Karthik Reddy
zynqmp_pm_is_function_supported() which checks feature support on som, which is implemented in firmware_zynqmp.c driver. As mini configuration does not use firmware driver, so create a weak function to avoid compilation error on zynqmp mini configuration. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/c60655a509956b8fc3a81671a7dc51157f3973db.1651048030.git.michal.simek@xilinx.com
2022-05-13Revert "arm64: xilinx: Set CONFIG_ZYNQMP_FIRMWARE config for mini emmc"T Karthik Reddy
This reverts commit 122ca834f2f4a9d70abeece3d1ff200a3556ab24. Disable CONFIG_ZYNQMP_FIRMWARE config from zynqmp & versal mini emmc defconfig files, as mini emmc does not use any firmware. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f73a50980d3af894f1e86cfc98742dbdec573760.1651048242.git.michal.simek@xilinx.com
2022-05-13xilinx: Handle board_get_usable_ram_top(0) properlyMichal Simek
board_get_usable_ram_top() was designed for getting the top most location for U-Boot allocation that's why function itself supports via total_size parameter to find out where the right location for U-Boot is. But function itself is also reused by different (EFI) which is passing total_size as 0 to find out where the usable ram top is. For this case doesn't make sense (a waste time) to call any lmb functions. That's why simply return gd->ram_top. And gd->ram_top is filled already based on previous call for U-Boot iself. The same solution is also used by stm32mp by commit 92b611e8b003 ("stm32mp: correctly handle board_get_usable_ram_top(0)") and commit c8510e397fad ("stm32mp: Fix board_get_usable_ram_top()"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/44470619e74f3e480b70deac24578e3e0d5c907e.1651225945.git.michal.simek@amd.com
2022-05-13soc: xilinx: zynqmp: fix out of bounds array accessMichal Simek
The call to xilinx_pm_request requires an array of a larger size. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/5f1409de285d7454af171a54e5f115da9d82c44e.1650440343.git.michal.simek@xilinx.com
2022-05-13soc: xilinx: versal: fix out of bounds array accessJorge Ramirez-Ortiz
The call to xilinx_pm_request requires an array of a larger size. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Link: https://lore.kernel.org/r/20220416181530.2311155-1-jorge@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-05-11Merge branch '2022-05-11-Kconfig-cleanups-etc'Tom Rini
- Migrate CONFIG_MTD_CONCAT to Kconfig, use CONFIG_VAL/IS_ENABLED in more places, rename SPL_LEGACY_IMAGE_SUPPORT to SPL_LEGACY_IMAGE_FORMAT and update some related dependencies for TI platforms.
2022-05-11Makefile: update warning about CONFIG_OF_EMBEDRalph Siemsen
Update the diagnostic message with revised location of document, which changed in 3e9fddfc4f1 ("doc: Move devicetree control doc to rST") Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
2022-05-11board_r: use IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) in board_init_r()Ovidiu Panait
Drop CONFIG_NEEDS_MANUAL_RELOC ifdefs in board_init_r() and use IS_ENABLED() instead. Also, use the MANUAL_RELOC() macro to update the initcall pointers. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2022-05-11Convert CONFIG_MTD_CONCAT to KconfigChris Packham
This converts the following to Kconfig: CONFIG_MTD_CONCAT Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-11common/console.c: use CONFIG_VAL() with PRE_CON_BUF_* variablesRasmus Villemoes
There is currently no support for PRE_CONSOLE_BUFFER in SPL, but if and when that gets implemented, one would almost certainly want to use a different address and/or size for the buffer (e.g., U-Boot proper might specify an address in DRAM and a generous buffer, while SPL would be much more constrained). So a prerequisite for adding SPL_PRE_CONSOLE_BUFFER is to make the code use SPL_-specific values. No functional change. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-05-11boot: Kconfig: Enable FIT processing by default on TI secure devicesAndrew Davis
TI secure devices chain-of-trust depends on FIT image processing, enable it by default on these devices. This also reduces the delta between the secure and non-secure defconfig files. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11boot: Kconfig: Disable non-FIT loading for TI secure devicesAndrew Davis
Non-FIT image loading support should be disabled for TI secure devices as the image handlers for those image types do not follow our secure boot checks. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11spl: Force disable non-FIT loading for TI secure devicesAndrew Davis
Booting of non-FIT images bypass our chain-of-trust boot flow, these options should not be allowed when high security is set. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11spl: Rename Kconfig SPL_LEGACY_IMAGE_SUPPORT to SPL_LEGACY_IMAGE_FORMATAndrew Davis
This matches what this support is called in the non-SPL case. The postfix _SUPPORT is redundant as enabling Kconfig options implies support. With this we can use CONFIG_IS_ENABLED() as needed. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-10Merge tag 'u-boot-stm32-20220510' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm Add new STM32 MCU boards and Documentation STM32 programmer improvements video: support several LTDC HW versions and fix data enable polarity board: fix stboard error message, consider USB cable connected when boot device is USB configs: stm32mp1: set console variable for extlinux.conf configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link ARM: stm32mp: Fix Silicon version handling and ft_system_setup() phy: stm32-usbphyc: Add DT phy tuning support arm: dts: stm32mp15: alignment with v5.18 ram: Conditionally enable ASR mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM pinctrl: stm32: rework GPIO holes management
2022-05-10Merge tag 'i2c-2022-07' of https://source.denx.de/u-boot/custodians/u-boot-i2cTom Rini
i2c changes for 2022.07 - i2c: ihs: intel: Fix typo in comments Patch from Michal - misc: atsha204a: Add support for atsha204 chip from Pali
2022-05-10misc: Fix always compiling MISC even for SPL/TPLSean Anderson
We should only build support for misc if the appropriate SPL/TPL symbol is defined. To ease the transition, make SPL/TPL_MISC default to MISC. This is necessary because many drivers don't specify their dependencies properly. These defaults can be removed once all drivers depend on the appropriate config. Fixes: aaba703fd0 ("spl: misc: Allow misc drivers in SPL and TPL") Signed-off-by: Sean Anderson <sean.anderson@seco.com> [trini: Add VPL_MISC symbol, handle like SPL/TPL_MISC] Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-10doc: Add documentation for STM32 MCUsPatrice Chotard
Add documentation for STM32 MCUs (F4, F7 and H7 series). Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32746g-eval: Add stm32746g-eval_spl_defconfigPatrice Chotard
Add stm32746g-eval_spl_defconfig for stm32746g evaluation board to build SPL. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32746g-eval: Add stm32746g-eval_defconfigPatrice Chotard
Add stm32746g-eval_defconfig for stm32746g evaluation board to build U-Boot proper. Full board description can be found here : https://www.st.com/en/evaluation-tools/stm32746g-eval.html Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f746-disco: use CONFIG_DEFAULT_DEVICE_TREE as fdtfilePatrice Chotard
As stm32f46-disco, stm32f769-disco and stm32746g-eval are very similar except their respective device tree file. These 3 boards uses the same TARGET_STM32F746_DISCO flag (so same include/configs/stm32f746-disco.h and same board file board/st/stm32f746-disco/stm32f746-disco.c) To be able to compile these 3 boards, replace the hard-coded device-tree name in include/configs/stm32f746-disco.h by CONFIG_DEFAULT_DEVICE_TREE which is set in each board defconfig file with the correct value. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10board: stm32f746-disco: Fix dram_init() in none SPL configPatrice Chotard
Replace CONFIG_SUPPORT_SPL by CONFIG_SPL_BUILD to allow dram_init() execution when using none SPL defconfig (stm32f746-disco_defconfig). Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f746-disco: Migrate SPL flags to defconfigPatrice Chotard
Migrate SPL flags to stm32f746-disco_spl_defconfig Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f769-disco: Migrate SPL flags to defconfigPatrice Chotard
Migrate SPL flags to stm32f769-disco_spl_defconfig Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f769-disco: Add stm32f769-disco_defconfigPatrice Chotard
Add stm32f769-disco_defconfig for stm32f769 discovery board to build U-Boot proper. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f769-disco: Rename stm32f769-disco_defconfig to ↵Patrice Chotard
stm32f769-disco_spl_defconfig The current stm32f769-disco_defconfig file supports SPL, rename it to stm32f769-disco_spl_defconfig to reflect the supported configuration. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f746-disco: Add stm32f746-disco_defconfigPatrice Chotard
Add stm32f746-disco_defconfig for stm32f746 discovery board to build U-Boot proper. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f746-disco: Rename stm32f746-disco_defconfig to ↵Patrice Chotard
stm32f746-disco_spl_defconfig The current stm32f746-disco_defconfig file supports SPL, rename it to stm32f746-disco_spl_defconfig to reflect the supported configuration. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f746-disco: Concatenate spl and u-boot binariesPatrice Chotard
This allows to concatenate spl and u-boot binaries together. Previously, both binaries has to be flashed separately at the correct offset (spl at offset 0 and u-boot at offset 0x8000). With this patch, only one binary is generated (u-boot-with-spl.bin) and has to be copied in flash at offset 0 using openocd for example or simply copied in exported mass storage. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10clk: stm32mp1: Add missing newlineMarek Vasut
Add missing newline to this debug message, no functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-05-10board: st: stm32mp1: Consider USB cable connected when boot device is USBPatrice Chotard
Always consider USB cable is connected when USB boot device is detected. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-07 03:21:16 +0000