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2025-03-18Merge tag 'u-boot-ufs-next-20250318' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ufs into next - initial cleanup and defines sync with Linux v6.12
2025-03-18Merge tag 'u-boot-amlogic-20250318' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic into next - odroid-n2: Update docs for signing - support Amlogic chip_id v1 and v2
2025-03-18Merge patch series "vepxpress64: disable CRC32 by default and add FVP with ↵Tom Rini
TF-A guide" Harrison Mutai <harrison.mutai@arm.com> says: This patch introduces two updates to the vexpress64 project: - Disable CRC32 by default to prevent aborts in a standard FVP setup. - Add a guide for running FVP with TF-A, providing a clear starting point for users. Link: https://lore.kernel.org/r/20250304165204.53097-1-harrison.mutai@arm.com
2025-03-18Merge patch series "*** Various Improvements for phyCORE-AM62/A SoMs ***"Tom Rini
Wadim Egorov <w.egorov@phytec.de> says: This patch series syncs the phyCORE-AM62Ax feature-wise with our other K3-based SoMs by adding SoM overlay handling and capsule updates. It also introduces support for USBDFU boot and includes various minor fixes. Link: https://lore.kernel.org/r/20250305045838.3614661-1-w.egorov@phytec.de
2025-03-18configs: j784s4-am69: Enable UFSUdit Kumar
J784S4 EVM board has UFS flash, So enable UFS configs Cc: Neha Francis <n-francis@ti.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com>
2025-03-18ufs: core: sync ufshci.h with Linux v6.12Neil Armstrong
Sync ufshci.h with the version found in the Linux v6.12 version commit adc218676eef ("Linux 6.12"). It adds new defines, and moves defines to the same place as the Linux header. No functional changes intended. Acked-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Love Kumar <love.kumar@amd.com> [narmstrong: do not rename CFG_RESULT_CODE_MASK] Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-6-4c6d7994a45d@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18ufs: core: sync unipro.h with Linux v6.12Neil Armstrong
Sync unipro.h with the version found in the Linux v6.12 version commit adc218676eef ("Linux 6.12"). It adds new defines, and moves defines to the same place as the Linux header. No functional changes intended. Acked-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Love Kumar <love.kumar@amd.com> Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-5-4c6d7994a45d@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18ufs: core: move ufshci defines in a separate headerNeil Armstrong
Splitting the header will help synchronizing the defines again with Linux. Acked-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Love Kumar <love.kumar@amd.com> Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-4-4c6d7994a45d@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18ufs: core: cosmetic fixupsNeil Armstrong
Fixes some alignment warnings, missing comments on write barrier, missing parenthesis around macro parameters and a comment typo. No functional changes intended. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Love Kumar <love.kumar@amd.com> Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-3-4c6d7994a45d@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18ufs: core: mark unexported functions as staticNeil Armstrong
Mark the remaining local functions as static to avoid build warnings. Also drop the EXPORT_SYMBOL of ufshcd_map_desc_id_to_length. Tested-by: Love Kumar <love.kumar@amd.com> Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-2-4c6d7994a45d@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18ufs: core: include missing include/ufs.hNeil Armstrong
Add missing ufs.h causing build warning on some symbols. Tested-by: Love Kumar <love.kumar@amd.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-1-4c6d7994a45d@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18board: odroid-n2: Update docs for signingBaltazár Radics
The previous instructions resulted in a bootloader that wouldn't fit in an MBR gap. I have updated the docs based on upstream's build process. Signed-off-by: Baltazár Radics <baltazar.radics@gmail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250110111335.9221-1-baltazar.radics@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18arch: arm: meson: support Amlogic chip_id v1 and v2Evgeny Bachinin
Patch introduces: * chip_id API - useful for various things, but used now for device_id (did) generation as mentioned in [1] on our private board code. Our device_id is calculated by means of permutations of chip_id value. * new SoCs (a1, s4, etc) are usually coming with the support of chip_id v2 right away, whereas secure monitors on old SoCs (like axg, g12b, g12a, etc) may support only chip_id v1. Chip_id API handles both cases * meson_sm_get_serial() is described via chip_id API. Links: [1] https://lore.kernel.org/linux-arm-kernel/202311242104.RjBPI3uI-lkp@intel.com/T/#m630fbeea6a6e7d531290b5c0af205af4fb979757 Signed-off-by: Viacheslav Bocharov <adeep@lexina.in> Co-developed-by: Arseniy Krasnov <avkrasnov@salutedevices.com> Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com> Link: https://lore.kernel.org/r/20250210-meson_chip_id_all_vers-v1-3-b98f8b6880b8@salutedevices.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18arm: meson: sm: get rid of SM_CHIP_ID_SIZEEvgeny Bachinin
SM_CHIP_ID_SIZE is used nowhere. Moreover, it specifies wrong chip_id size: Amlogic chip_id v1 and v2 is always 16 bytes long. Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com> Link: https://lore.kernel.org/r/20250210-meson_chip_id_all_vers-v1-2-b98f8b6880b8@salutedevices.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18arm: meson: unify type being used for socinfoEvgeny Bachinin
socinfo_ API uses u32 type, hence let's use it everywhere for consistency. Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com> Link: https://lore.kernel.org/r/20250210-meson_chip_id_all_vers-v1-1-b98f8b6880b8@salutedevices.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-03-18configs: phycore_am62ax_a53_defconfig: Add SoM overlays to OF_OVERLAY_LISTWadim Egorov
Include SoM dt-overlays for DT control so we can include them into our u-boot FIT image. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18arm: dts: k3-am62a-phycore-som-binman: Add SoM overlaysWadim Egorov
Include SoM dt-overlays that handle variants of our SoMs into u-boot's FIT image. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18board: phytec: common: Add phyCORE-AM62AxDaniel Schultz
Add the phyCORE-AM62Ax to our common board directory to enable our SOM detection for this product. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18board: phytec: common: k3: Make configure_capsule_updates() staticWadim Egorov
This function is only used in the board.c file. Make it static. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18arch: arm: dts: k3-am625-phyboard-lyra: Add missing boot phase tagWadim Egorov
Add the bootph-all tag to usb0_phy_ctrl node to ensure it is properly initialized during the boot process. This fixes the following issue: dwc3-am62 dwc3-usb@f900000: unable to get ti,syscon-phy-pll-refclk regmap Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18arch: arm: dts: k3-am62a7-phyboard-lyra: Add missing boot phase tagWadim Egorov
Add the bootph-all tag to usb0_phy_ctrl node to ensure it is properly initialized during the boot process. This fixes the following issue: dwc3-am62 dwc3-usb@f900000: unable to get ti,syscon-phy-pll-refclk regmap Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18board: phytec: phycore_am62ax: Add Network/SPI/DFU env variablesWadim Egorov
Include the boot logic to boot via Network, from a OSPI/QSPI NOR flash or via USB DFU. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18board: phytec: phycore_am62x: Use custom k3_dfu.env fragmentWadim Egorov
TI's k3_dfu.env includes redundant dfu_alt_info_* data, some of which is incompatible with our board configuration. Replace it with a custom variant that better aligns with our setup, ensuring correct offsets and eliminating unnecessary entries. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18configs: Add phycore_am62ax_r5_usbdfu_defconfigWadim Egorov
This config includes the phycore_am62ax_r5_defconfig file as well as the am62x_r5_usbdfu.config fragment. We need another defconfig because the AM62Ax has not enough internal SRAM to support all boot sources. The normal phycore_am62ax_r5_defconfig should allow to boot from MMC and OSPI while this new defconfig allows to boot from USB. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18doc: phytec: k3: Add a common part for Environment and EFI CapsulesWadim Egorov
Provide a common part for our K3 based boards including general details about environment handling and EFI capsule updates. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18configs: phycore_am62ax_a53_defconfig: Enable capsule updateWadim Egorov
Enable raw & on disk capsule updates and provide configs required for updating MTD devices. Also resync after savedefconfig. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18include: configs: phycore-am62ax: Define capsule FW namesWadim Egorov
Define firmware names for phycore-am62ax capsules. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18arm: dts: k3-am62a-phycore-som-binman: Provide capsule nodesWadim Egorov
Fill in phycore-am62ax capsule GUID properties of the base binman capsule nodes. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18vepxress64: add guide for running FVP with TF-AHarrison Mutai
Add documentation on how to run FVP with U-Boot and TF-A. This helps users configure and run U-Boot correctly on Arm models. Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-03-18vepxress64: disable CRC32 by default to prevent abortsHarrison Mutai
On fast models, the CRC32 feature is disabled by default. When enabled in U-Boot, it leads to synchronous aborts due to unrecognized instructions. This change ensures CRC32 is disabled by default to maintain compatibility. Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-03-18sandbox_vpl: Enable missing TPL_DM_I2C symbolTom Rini
Currently this platform implicity builds CONFIG_TPL_DM_I2C support without setting the symbol. Add it for clarity. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-03-18serial: Add missing TPL_SYS_NS16550_SERIAL symbolTom Rini
On PowerPC platforms with TPL enabled and SPL_SYS_NS16550_SERIAL enabled, today this builds under TPL as well due to how $(XPL_) is defined. Add the TPL_SYS_NS16550_SERIAL itself for consistency and clarity. Signed-off-by: Tom Rini <trini@konsulko.com>
2025-03-18board: beagle: Add support for BeagleY-AIRobert Nelson
Basic board support for BeagleY-AI. Information on this board can be found at https://beagleboard.org/beagley-ai Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew Davis <afd@ti.com>
2025-03-17Merge patch series "lmb: miscellaneous fixes and improvements"Tom Rini
Sughosh Ganu <sughosh.ganu@linaro.org> says: The patch series contains some fixes and improvements in the lmb code, along with addition of corresponding test cases for the changes made. The lmb_reserve() function currently does not check if the requested reservation would overlap with existing reserved regions. While some scenarios are being handled, some corner cases still exist. These are being handled by patch 1, along with adding test cases for these scenarios. Patch 2 is handling the case of reserving a new region of memory, but that region overlaps with an existing region. The current code only handles one particular scenario, but prints a message for the other scenario of an encompassing overlap and returns back. The patch handles the encompassing overlap. Patch 3 is an improvement whereby we allow coalescing a newly reserved region with an existing region. The current code exits this check prematurely. Patch 4 is removing a now superfluous check for overlapping regions with flag other than LMB_NONE. This now gets handled at an earlier point in lmb_reserve(). Patch 5 is clubbing the functionality to check if two regions are adjacent, or overlap, allowing some code re-use. Patch 6 is optimising the lmb_alloc() function by having it call _lmb_alloc_base() directly. Link: https://lore.kernel.org/r/20250303133231.405279-1-sughosh.ganu@linaro.org
2025-03-17lmb: optimise the lmb allocation functionsSughosh Ganu
The actual logic to allocate a region of memory is in the _lmb_alloc_base() function. The lmb_alloc() API function calls lmb_alloc_base(), which then calls _lmb_alloc_base() to do the allocation. Instead, call the _lmb_alloc_base() directly from both the allocation API's, and move the error message to the _lmb_alloc_base(). Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2025-03-17lmb: use a common function to check if regions overlap or are adjacentSughosh Ganu
The functions to check if the two said regions are adjacent or overlap are pretty similar in nature. Club the functionality into a single function lmb_regions_check() and return the appropriate return value to signify this aspect. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2025-03-17lmb: remove superfluous address overlap check from lmb_add_region_flags()Sughosh Ganu
U-Boot allows re-use of already reserved memory through the lmb_reserve() and lmb_alloc_addr() API's. This memory re-use is allowed only when the flag of the existing reserved region and that of the requested region is LMB_NONE. A check was put in the lmb_add_region_flags() in commit 8b8b35a4f5e to handle the scenario where an already reserved region was re-requested with region flag other than LMB_NONE -- the function then returns -EEXIST in such a scenario. The lmb_reserve() function now does a check for a reservation request with existing reserved regions, and returns -EEXIST in case of an overlap but when the flag check fails. Remove this now redundant check from lmb_add_region_flags(). Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2025-03-17lmb: check for a region's coalescing with all existing regionsSughosh Ganu
The lmb_add_region_flags() first checks if the new region to be added can be coalesced with existing regions. The check stops if the two regions are adjecent but their flags do not match. However, it is possible that the newly added region might be adjacent with the next existing region and with matching flags. Check for this possibility by not breaking out of the loop. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-03-17lmb: handle scenario of encompassing overlapSughosh Ganu
The lmb_fix_over_lap_regions() function is called if the added region overlaps with an existing region. The function then fixes the overlap and removes the redundant region. However, it makes certain assumptions. One assumption is that the overlap would not encompass the existing region. Another assumption is that the overlap only occurs between two regions -- the scenario of the added region overlapping multiple existing regions is not being handled. Handle these cases by instead calling lmb_resize_regions(). Also remove the now superfluous lmb_fix_over_lap_regions(). Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-03-17lmb: check if a region can be reserved by lmb_reserve()Sughosh Ganu
The logic used in lmb_alloc() takes into consideration the existing reserved regions, and ensures that the allocated region does not overlap with any existing allocated regions. The lmb_reserve() function is not doing any such checks -- the requested region might overlap with an existing region. This also shows up with lmb_alloc_addr() as this function ends up calling lmb_reserve(). Add a function which checks if the region requested is overlapping with an existing reserved region, and allow for the reservation to happen only if both the regions have LMB_NONE flag, which allows re-requesting of the region. In any other scenario of an overlap, have lmb_reserve() return -EEXIST, implying that the requested region is already reserved. Add corresponding test cases which check for overlapping reservation requests made through lmb_reserve() and lmb_alloc_addr(). And while here, fix some of the comments in the test function being touched. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-03-17Merge branch 'next' of git://source.denx.de/u-boot-usb into nextTom Rini
- Add USB support on Starfive JH7110
2025-03-17Merge branch 'nand-next' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/25178 This merge request add support for cadence raw nand driver for agilex board and add a fix to meson driver.
2025-03-17configs: starfive: Add visionfive2 cadence USB configurationMinda Chen
Add cadence USB confiuration. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Tested-by: E Shattow <lucent@gmail.com>
2025-03-17spl: starfive: visionfive2: Disable USB overcurrent pin by default.Minda Chen
For some JH7110 boards, USB host overcurent pin is not reserved, To make USB host work, overcurrent pin must be disabled. So set the pin default disabled in spl stage. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Tested-by: E Shattow <lucent@gmail.com>
2025-03-17usb: cdns: starfive: Add cdns USB driverMinda Chen
Add Starfive cdns USB3 wrapper driver. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Marek Vasut <marex@denx.de> Tested-by: E Shattow <lucent@gmail.com>
2025-03-17usb: cdns: starfive: Get dr mode from wrapper device dts nodeMinda Chen
Cdns core driver also get dr mode from wrapper devcie dts node to make it is same with Starfive cdns USB Linux kernel driver, Starfive 7110 OF_UPSTREAM is enabled Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Marek Vasut <marex@denx.de>
2025-03-17phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driverMinda Chen
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic PHY driver and can be used as USB 3.0 driver. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Tested-by: E Shattow <lucent@gmail.com>
2025-03-17phy: starfive: Add Starfive JH7110 USB 2.0 PHY driverMinda Chen
Add Starfive JH7110 USB 2.0 PHY driver, which is generic PHY driver. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Tested-by: E Shattow <lucent@gmail.com>
2025-03-17usb: cdns3: Set USB PHY mode in cdns3_drd_update_mode()Minda Chen
USB PHY maybe need to set PHY mode in different USB dr mode. So translate USB PHY mode to generic PHY mode and call generic_phy_set_mode(). Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Marek Vasut <marex@denx.de>
2025-03-16mtd: rawnand: meson: always use OOB bytes during writeArseniy Krasnov
If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL), then driver doesn't copy OOB data from 'oob_poi' to special controller structures, so zeroes will be written as OOB. But, generic raw NAND logic in 'nand_base.c' already handles case when OOB is not required to write by filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to always read 'oob_poi' data for OOB. Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way, so need to keep same behaviour here. Fixes: c2e8c4d09a7a ("mtd: rawnand: Meson NAND controller support") Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>