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2025-01-14arm64: zynqmp: Do not use hardcoded address in do_zynqmp_reboot()Michal Simek
multi_boot is already the part of csu_base structure that's why use it directly instead of using register offset value. Fixes: fc001432e5b0 ("arm64: zynqmp: Add u-boot command to boot into recovery image") Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/3e5c6ea426b81cc73b90e6425764e41a98deb2a6.1733735454.git.michal.simek@amd.com
2025-01-14arm64: versal: RO multi_boot register in non JTAG bootmodeMichal Simek
The main reason for this change is that upstream QEMU has no multiboot register implemented that's why access to it fails which ends up in CI failure for our target. That's why in JTAG bootmode returns 0 which is correct behaviour because multiboot register is not used in this mode and value should be ignored and as a side effect it is also fixing CI/Qemu issue. Also move versal_get_bootmode() to avoid function declaration. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/484b9cafc45e72308a1a29a3ab772020f96784cc.1736155238.git.michal.simek@amd.com
2025-01-14arm64: versal: Support operations around multiboot registerMichal Simek
Read multiboot register and show it's value by default. Also extend logic in dfu_alt_info string generation to support capsule update for different offsets. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/72ba2efd0fb7b66a86b409a1521fe288a4dd3453.1733395093.git.michal.simek@amd.com
2025-01-14arm64: versal: Wire SPIs for dfu_alt_info variable generationMichal Simek
Enable automatic dfu_alt_info variable generation based on MTD partition. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/67ff88c8c7186138353c0b74ed37a318fb4b199e.1733395093.git.michal.simek@amd.com
2025-01-13Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-usbTom Rini
- ehci-mx5/ehci-mx6 driver improvements
2025-01-13usb: ehci-mx6: Add i.MX95 supportMarek Vasut
i.MX95 uses the same USB IP as i.MX8MM. It can then reuse the ehci-mx6 driver. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2025-01-12Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-shTom Rini
2025-01-12arm64: renesas: Convert boards over to is_cortex_a() functionsMarek Vasut
Use generic is_cortex_a() functions instead of open-coded midr_el1 read. No functional change. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-01-12arm64: Add MIDR entries for Cortex-A57 and Cortex-A76Marek Vasut
Add MIDR entries for Cortex-A57 and Cortex-A76 cores. Those are used on R-Car Gen3 and Gen4 SoCs respectively. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-01-12arm64: Convert core type check macros into inline functionsMarek Vasut
Turn the core type check macros into inline functions to perform better type checking on them. The inline functions get optimized out in case they are not used. Indent the MIDR_PARTNUM_CORTEX_An macros in preparation for addition of future three-digit cores and use MIDR_PARTNUM_SHIFT in MIDR_PARTNUM_MASK to be consistent. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-01-10Merge tag 'u-boot-rockchip-20250110' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/24129 - Add boards: rk3566: FriendlyARM NanoPi R3S rk3588s: Radxa ROCK 5C, rk3588: Khadas Edge2 - Migrate to OF_UPSTREAM: rk3066a/rk3188; rk3288: tinker, miqi, firefly; - Migrate to TPL: rk3399 kevin and bob;
2025-01-10rockchip: rk3308: Implement checkboard() to print SoC variantJonas Karlman
Implement checkboard() to print current SoC variant used by a board, e.g. one of: SoC: RK3308 SoC: RK3308B SoC: RK3308B-S when U-Boot proper is running. U-Boot 2025.01-rc1 (Nov 02 2024 - 20:26:25 +0000) Model: Radxa ROCK Pi S SoC: RK3308B DRAM: 512 MiB (effective 510 MiB) Information about the SoC variant is read from GRF. Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2025-01-10rockchip: rk3588: Implement checkboard() to print SoC variantJonas Karlman
Implement checkboard() to print current SoC model used by a board, e.g. one of: SoC: RK3582 SoC: RK3588 SoC: RK3588J SoC: RK3588S SoC: RK3588S2 when U-Boot proper is running. U-Boot 2025.01-rc1 (Nov 10 2024 - 00:31:29 +0000) Model: Generic RK3588S/RK3588 SoC: RK3588S2 DRAM: 8 GiB Information about the SoC model and variant is read from OTP. Also update rk3588s-u-boot.dtsi to include OTP in U-Boot pre-reloc phase, where checkboard() is called. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk356x: Implement checkboard() to print SoC variantJonas Karlman
Implement checkboard() to print current SoC model used by a board, e.g. one of: SoC: RK3566 SoC: RK3566T SoC: RK3568 SoC: RK3568B2 SoC: RK3568J when U-Boot proper is running. U-Boot 2025.01-rc1 (Nov 10 2024 - 00:39:37 +0000) Model: Generic RK3566/RK3568 SoC: RK3568J DRAM: 8 GiB (effective 7.7 GiB) Information about the SoC model and variant is read from OTP. Also update rk356x-u-boot.dtsi to include OTP in U-Boot pre-reloc phase, where checkboard() is called. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399-rock-pi-4: Fix Synchronous AbortJonas Karlman
After the commit 788cf33315c7 ("efi: add a helper to generate dynamic UUIDs") update_info.num_images must match number of valid update images. On Rock Pi 4 following Synchronous Abort can be observed due to fw_name being NULL: Scanning global bootmeth 'efi_mgr': "Synchronous Abort" handler, esr 0x96000010, far 0x0 elr: 0000000000200e28 lr : 000000000028adb8 (reloc) elr: 00000000f3efbe28 lr : 00000000f3f85db8 x0 : 0000000000000000 x1 : ffffffffffffffff x2 : 0000000000000000 x3 : 000000000000000e x4 : 0000000000000000 x5 : 00000000f1ef0d78 x6 : 00000000f3fb3b90 x7 : 0000000000000044 x8 : 0000000000000010 x9 : 0000000000000031 x10: 00000000f0ea3fff x11: 00000000f1f29e00 x12: 0000000000000002 x13: fffffffffffff000 x14: 00000000f1f29e00 x15: 0000000000000018 x16: 00000000f3f44f7c x17: 0000000000000000 x18: 00000000f1ef2de0 x19: 00000000f0ea3040 x20: 00000000f3ff53d8 x21: 00000000f3fd0498 x22: 0000000000000000 x23: 00000000f1edb960 x24: 00000000f1edb95f x25: 00000000f1edb990 x26: 00000000f1edb964 x27: 00000000f1edb998 x28: 00000000f1edc1ec x29: 00000000f1edb820 Code: aa0003e2 d2800000 eb01001f 54000060 (78607843) Resetting CPU ... resetting ... Fix this by setting update_info.num_images to 0 when no valid update images is added to update_info. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: FUKAUMI Naoki <naoki@radxa.com>
2025-01-10clk: rockchip: rk3588: fix mask define for aclk_vop_rootHeiko Stuebner
The mask for aclk_vop_root is 3-bit wide, not 2-bit wide according to the TRM, so set the mask accordingly. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3588-nanopc-t6-lts: Add missing board -u-boot.dtsiJonas Karlman
The commit 7cec3e701940 ("rockchip: rk3588-nanopc-t6: Add support for NanoPC-T6 LTS") added support for the LTS variant of NanoPC T6. However, a board specific -u-boot.dtsi file was never added. Due to the missing -u-boot.dtsi file the LTS fdt included in the FIT is never tagged with bootph props. When ENV_IS_IN_SPI_FLASH is enabled, not enabled in defconfig, the env can successfully load from SPI flash on the non-LTS variant, something that does not work on the LTS variant due to missing bootph-some-ram props in the LTS fdt. Fix this by adding a LTS -u-boot.dtsi file that just include the non-LTS -u-boot.dtsi file. Reported-by: Ricardo Pardini <ricardo@pardini.net> Fixes: 7cec3e701940 ("rockchip: rk3588-nanopc-t6: Add support for NanoPC-T6 LTS") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399: Drop unneeded bob and kevin board specific codeJonas Karlman
The IO-domain driver will configure io_vsel and always-on/boot-on regulators will be enabled based on the board device tree now that required nodes and Kconfig options is enabled for SPL. Remove the bob and kevin board specific code from the common rk3399.c, the IO-domain and regulator driver provide similar functionality. Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2025-01-10rockchip: rk3399-gru: Include pinctrl and regulators in SPLJonas Karlman
Add bootph props and enable related Kconfig options to include vital regulators in SPL. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399-gru: Use SDMA mode to read from eMMCJonas Karlman
Enable use of SDMA mode when reading from eMMC to speed up boot. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399-gru: Enable dcache and signature validation in SPLJonas Karlman
With TPL being used to init DRAM, SPL being used to load FIT and the adjusted FIT payload offset it is now possible to increase the size limit of SPL to 256 KB and enable uses of dcache and FIT signature validation. Drop SPL_SYS_DCACHE_OFF=y to enable use of dcache in SPL. Drop SPL_FIT_SIGNATURE=n to enable signature validation of FIT in SPL. Change SPL_MAX_SIZE to 256 KB now that payload offset has moved in SPI and TF-A may be loaded to 0x40000 in DRAM. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399-gru: Remove unused nodes from xPL control FDTJonas Karlman
The eMMC PHY and SPI flash is not used in all xPL phases. Change to no longer include emmc_phy and spi_flash in all xPL phases. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399: Drop common Kconfig options already impliedJonas Karlman
The last two RK3399 boards, chromebook bob and kevin, have now migraded to use common bss and stack addresses. Cleanup and remove Kconfig options no longer needed in rk3399/Kconfig when all boards now use common bss and stack addresses. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399-gru: Include binman generated FIT in u-boot.rom imageJonas Karlman
The u-boot.rom image contain u-boot.img FIT instead of the FIT generated by binman for the u-boot-rockchip.bin image. Change to include the binman generated FIT for the u-boot.rom image. This change result in TF-A being included and the use sha256 instead of crc32 checksum in the u-boot.rom FIT. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399-gru: Use TPL with common bss and stack addressesJonas Karlman
Migrate to use TPL, common bss, stack and malloc heap size and addresses to unify memory use in TPL, SPL and pre-reloc with other RK3399 boards. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Disable TPL_BLOBLIST) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399-gru: Fix include of TPL in u-boot.rom imageJonas Karlman
The chromebook specific u-boot.rom image does not include TPL when building with TPL=y or ROCKCHIP_EXTERNAL_TPL=y. Fix this by adding rockchip-tpl and u-boot-tpl nodes to the mkimage node for the u-boot.rom binman image. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399-gru: Move SPI flash payload offset for bob and kevinJonas Karlman
The BootROM on RK3399 only read the first 2 KB of each 4 KB page from SPI flash. With current FIT payload offset of 0x40000 this limits the supported TPL+SPL size to only 128 KB. Change to use 0xE0000 as FIT payload offset, similar to other RK3399 boards, to allow a maximum size for TPL of 192 KB and SPL of 256 KB. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399-gru: Use SYS_SPI_U_BOOT_OFFS value in offset propJonas Karlman
Use the offset configured with SYS_SPI_U_BOOT_OFFS Kconfig option instead of a hardcoded 0x40000 for the FIT payload offset. This has no intended impact as SYS_SPI_U_BOOT_OFFS=0x40000. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399: Fix TPL build of bob and kevinJonas Karlman
Building chromebook_bob/kevin with TPL=y ends with a linking error: arch/arm/mach-rockchip/rk3399/rk3399.o: in function `board_debug_uart_init': arch/arm/mach-rockchip/rk3399/rk3399.c:148:(.text.board_debug_uart_init+0x34): undefined reference to `spl_gpio_output' arch/arm/mach-rockchip/rk3399/rk3399.c:148:(.text.board_debug_uart_init+0x34): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `spl_gpio_output' make[2]: *** [scripts/Makefile.xpl:542: tpl/u-boot-tpl] Error 1 make[1]: *** [Makefile:2134: tpl/u-boot-tpl] Error 2 make: *** [Makefile:568: __build_one_by_one] Error 2 Change to only use spl_gpio functions in SPL to fix this. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3399: expand space for decompressed kernelFUKAUMI Naoki
fix following error by using same ENV_MEM_LAYOUT_SETTINGS with rk35xx: U-Boot 2025.01-rc3-00001-g1527c7dcdb01 (Dec 02 2024 - 22:57:18 +0000) : Retrieving file: /boot/extlinux/../nixos/dhqjsnprmzjxncil3m0g9l09a479crn3-linux-6.12.1-Image Retrieving file: /boot/extlinux/../nixos/6fq8fmmab31yxdwcs7zw44p78fq9fy1s-initrd-linux-6.12.1-initrd append: init=/nix/store/yjbxgzf1vkwbw6ab738bf4kxazhyypa1-nixos-system-rock-5b-25.05.20241201.ac35b10/init console=ttyS2,1500000n8 console=ttyAMA0,115200n8 console=tty0 loglevel=7 Retrieving file: /boot/extlinux/../nixos/dhqjsnprmzjxncil3m0g9l09a479crn3-linux-6.12.1-dtbs/rockchip/rk3399-rock-4se.dtb Moving Image from 0x2080000 to 0x2200000, end=0x60d0000 ERROR: RD image overlaps OS image (OS=2200000..60d0000) Boot failed (err=-14) $ ls -lh boot/nixos/ total 84M -r--r--r-- 1 root root 24M Jan 1 1970 6fq8fmmab31yxdwcs7zw44p78fq9fy1s-initrd-linux-6.12.1-initrd -r--r--r-- 1 root root 62M Jan 1 1970 dhqjsnprmzjxncil3m0g9l09a479crn3-linux-6.12.1-Image dr-xr-xr-x 36 root root 4.0K Jan 1 1970 dhqjsnprmzjxncil3m0g9l09a479crn3-linux-6.12.1-dtbs similar problem was fixed for rk35xx by: commit 69b73877f02c ("rockchip: rk35xx: expand space for decompressed kernel") Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10board: theobroma-systems: Update TF-A setup steps for RK3588 boardsDaniel Semkowicz
ddrbin_tool interface has been changed. Additional chip_name argument is now required to modify ddr binary file. Update documentation to be consistent with the new interface. Update BL31 and ROCKCHIP_TPL file paths to match current version of binaries available in the rkbin repository. Signed-off-by: Daniel Semkowicz <dse@thaumatec.com> Acked-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-01-10rockchip: rk3066a/rk3188: use includes from dts/upstreamJohan Jonker
The clock and power DT includes for rk3066a and rk3188 are now available in the dts/upstream directory, so remove the ones that are now redundant. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: use OF_UPSTREAM for rk3066a/rk3188Johan Jonker
The device tree for rk3066a/rk3188 combined is now available in the /dts/upstream directory. Use imply OF_UPSTREAM to migrate all rk3066a/rk3188 boards. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: Add support for Radxa ROCK 5CFUKAUMI Naoki
Radxa ROCK 5C[1] is a Rockchip RK3588S2 based single board computer. [1] https://radxa.com/products/rock5/5c Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10arm64: dts: rockchip: add Radxa ROCK 5CFUKAUMI Naoki
Radxa ROCK 5C is a 8K computer for everything[1] using the Rockchip RK3588S2 chip: - Rockchip RK3588S2 - Quad A76 and Quad A55 CPU - 6 TOPS NPU - up to 32GB LPDDR4x RAM - eMMC / SPI flash connector - Micro SD Card slot - Gigabit ethernet port (supports PoE with add-on PoE HAT) - WiFi6 / BT5.4 - 1x USB 3.0 Type-A HOST port - 1x USB 3.0 Type-A OTG port - 2x USB 2.0 Type-A HOST port - 1x USB Type-C 5V power port [1] https://radxa.com/products/rock5/5c Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20241021090548.1052-2-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 3ddf5cdb77e6efd6fe9b70f36dec935e324a3cd2 ] (cherry picked from commit f80689fcef4b9b07a97b629b4075cc1a4c21a68e) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10arm64: dts: rockchip: Add HDMI0 node to rk3588Cristian Ciocaltea
Add support for the HDMI0 output port found on RK3588 SoC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-1-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: d7bb71e69f58c1b3665a9f926bf8d3855111bf8e ] (cherry picked from commit a839348380c2072e00a26bbdb80744982fe04c56) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10arm64: dts: rockchip: Split up RK3588's PCIe pinctrlsSam Edwards
These pinctrls manage the low-speed PCIe signals: - CLKREQ#: An output on the RK3588 (both RC or EP modes), used to request that external clock-generation circuitry provide a clock. - PERST#: An input on the RK3588 in EP mode, used to detect a reset signal from the RC. In RC mode, the hardware does not use this signal: Linux itself generates it by putting the pin in GPIO mode. - WAKE#: In EP mode, this is an output; in RC mode, this is an input. Each of these signals serves a distinct purpose, and more importantly, PERST# should not be muxed when the RK3588 is in the RC role. Bundling them together in pinctrl groups prevents proper use: indeed, almost none of the current board-specific .dts files make any use of them. (Exception: Rock 5A recently had a patch land that misuses _pins; this patch corrects that.) However, on some RK3588 boards, the PCIe 3 controller will indefinitely stall the boot if CLKREQ# is not muxed (details in the next patch). This patch unbundles the signals to allow them to be used. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Link: https://lore.kernel.org/r/20240912025034.180233-2-CFSworks@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 4294e32111781b3de4d73b944cbd1bc1662a9a7a ] (cherry picked from commit 8713425fa162b61bcf5f7a6dcd171fddfb12be36) Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10board: rockchip: add FriendlyElec NanoPi R3STianling Shen
The NanoPi R3S(as "R3S") is an open source platform with dual-Gbps Ethernet ports designed and developed by FriendlyElec for IoT applications. Specification: - Rockchip RK3566 - 2GB LPDDR4X RAM - optional 32GB eMMC module - SD card slot - 2x 1000 Base-T - 3x LEDs (POWER, LAN, WAN) - 2x Buttons (Reset, MaskROM) - 1x USB 3.0 Port - Type-C 5V 2A Power Signed-off-by: Tianling Shen <cnsztl@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10arm64: dts: rockchip: reorder mmc aliases for NanoPi R3STianling Shen
Typically any non-removable storage (emmc) is listed before removable storage (sd-card) options. Also U-Boot will try to override and use mmc0=sdhci and mmc1=sdmmc0 for all rk356x boards. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-6-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: b7cd1115456d312f8c5e60c80fdc35fd35ea6eab ] Signed-off-by: Tianling Shen <cnsztl@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10arm64: dts: rockchip: enable eMMC HS200 mode for NanoPi R3STianling Shen
It is required to boot from eMMC without additional patch in u-boot. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-5-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 1b5365034410f1ca21adadadd492b99bdf4f2c55 ] Signed-off-by: Tianling Shen <cnsztl@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10arm64: dts: rockchip: sort props in pmu_io_domains node for NanoPi R3STianling Shen
The status prop is typically the last prop. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-4-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 17e150fdd983c7e59b9240e34a166285f3c3fb39 ] Signed-off-by: Tianling Shen <cnsztl@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10arm64: dts: rockchip: replace deprecated snps, reset props for NanoPi R3STianling Shen
Replace deprecated snps,reset props and move them to the PHY node. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-3-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 82b2868937883b65732da498b26366d34db61510 ] Signed-off-by: Tianling Shen <cnsztl@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10arm64: dts: rockchip: fix model name for FriendlyElec NanoPi R3STianling Shen
Use the marketing name for model name, this matches the dt-binding. Also update the website url in copyright. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-2-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: b5bf84206a5c77528f9dd4cbca4e72caa063c102 ] Signed-off-by: Tianling Shen <cnsztl@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10arm64: dts: rockchip: Add FriendlyARM NanoPi R3S boardTianling Shen
The NanoPi R3S(as "R3S") is an open source platform with dual-Gbps Ethernet ports designed and developed by FriendlyElec for IoT applications. Specification: - Rockchip RK3566 - 2GB LPDDR4X RAM - optional 32GB eMMC module - SD card slot - 2x 1000 Base-T - 3x LEDs (POWER, LAN, WAN) - 2x Buttons (Reset, MaskROM) - 1x USB 3.0 Port - Type-C 5V 2A Power Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241020173946.225960-2-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 50decd493c8394c52d04561fe4ede34df27a46ba ] Signed-off-by: Tianling Shen <cnsztl@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3288-firefly: Change to use FITJonas Karlman
Change to use FIT and FIT_SIGNATURE when loading U-Boot proper in SPL to allow checksum validation and fallback loading of FIT from a different mmc device. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3288-firefly: Fix slow Ethernet initializionJonas Karlman
For some reason the Ethernet PHY reset delay is set to 1 second, this cause an unneccecery long boot delay. Firefly-RK3288 use RTL8211 Ethernet PHY, datasheet list an initial 10ms delay and then a 30-76ms delay before accessing registers. Change to use 80ms delay instead of a full second to speed up Ethernet initializion in U-Boot. Also enable PHY_REALTEK, DM_ETH_PHY and PHY_GIGE to improve Ethernet PHY support in U-Boot. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3288-firefly: Migrate to OF_UPSTREAMJonas Karlman
The device tree for Firefly-RK3288 in dts/upstream can be used as-is by U-Boot, migrate board to use OF_UPSTREAM. Add chosen stdout-path prop to board u-boot.dtsi as it is missing in DT from dts/upstream. Also change to use the upstream power_led symbol. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3288-firefly: Drop USE_PREBOOT Kconfig optionJonas Karlman
After the migration to use standard boot, storage media devices should automatically be initialized in the order listed in boot_targets env. Drop USE_PREBOOT to speed up boot when booting from SD-card or eMMC. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3288-firefly: Drop use of silent console and late boardinfoJonas Karlman
Current use of SILENT_CONSOLE hide valuable information when something goes wrong during boot, drop this Kconfig option to allow user to see e.g. from what media U-Boot proper is loaded from. A second Model line is printed on console due to DISPLAY_BOARDINFO_LATE, drop this Kconfig option to remove the second redundant line. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-01-10rockchip: rk3288-firefly: Include sdmmc regulator in SPLJonas Karlman
Add bootph props and enable related Kconfig options to include the sdmmc regulator in SPL. Also enable SPL_DM_SEQ_ALIAS to ensure aliases is handled correctly in SPL. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-06 01:58:16 +0000