| Age | Commit message (Collapse) | Author |
|---|
|
In absence of Device Manager (DM) services such as at R5 SPL stage,
driver will have to natively setup TCHAN/RCHAN/RFLOW cfg registers.
Existing UDMA driver performed the above mentioned configuration
for UDMA. Add similar configuration for PKTDMA here.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
|
|
Function "k3_ringacc_ring_reconfig_qmode_raw()" should reset qmode to
requested value and should not update other fields in ring configuration
register.
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
|
|
Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to
requested size and not to 0. Fix this.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
|
|
Initialize base address of ring config registers required to natively
setup ring cfg registers in the absence of Device Manager (DM) services
at R5 SPL stage. Since register property is defined as "ring" for PKTDMA
and "cfg" for UDMA, configure base address of ring configuration register
accordingly.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
|
|
RX_FL_CFG message should not be forwarded to TIFS and should be
handled within R5 SPL (when DM services are not available). Add
a no-op function to not handle RX_FL_CFG messages.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
|
|
Initialize DRAM size in SPL stage since networking requires DDR
to be initialized.
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
|
|
Define spl_set_header_raw_uboot() always so we can drop the last #ifdef
in this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
|
|
This function has a number of unnecessary #ifdefs so remove them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
|
|
These should have a CONFIG_ prefix. Add it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7a0d88076b9 ("Add in the ability to load and boot an uncompr...")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
|
|
Rather than repeating the same code in two files (SPL and TPL), move it
to a shared filed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
|
|
https://source.denx.de/u-boot/custodians/u-boot-samsung into next
|
|
https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-20240820
- Migrate Atmel usb gadget to DM_USB_GADGET
- More small cleanups/improvements on the atmel UDC driver
- Change udc uclass name from "usb" -> "usb_gadget"
|
|
Currently both USB host uclass and USB gadget uclass are using the same
name "usb" which break uclass functions like uclass_get_by_name().
Rename the uclass to "usb_gadget" to fix, also makes bind/unbind by class
index (or sequence) working.
This breaks the capacity of using "usb" as DT alias sequence numbering
which needs a fix afterwards.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/all/20240802092820.917450-1-admin@hifiphile.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
|
|
Prepare v2024.10-rc3
|
|
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
Christian Marangi <ansuelsmth@gmail.com> says:
These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
|
|
Add missing A1/2SYS clock ID just as a reference for OF_UPSTREAM
support. These clocks are not defined and are not usable as current
clock topckgen OPs doesn't support gates.
These special node won't ever be used by uboot hence just add them for
reference.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
|
|
Add missing PERIBUS_SEL clock to match upstream linux clk ID order. Also
convert pericfg to mux + gate implementation as now we have also mux on
top of gates.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Add missing clock PERI_UART4_PD for peri clock gates. This is needed to
match upstream linux clk ID in preparation for OF_UPSTREAM.
Also convert infracfg to mux + gate implementation as now we have mux on
top of gates.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Add missing infra clock MUX1_SEL needed for CPU clock. This is needed to
match the upstream clk ID order in preparation for OF_UPSTREAM.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Add missing clock for MAIN_CORE_EN. This is a special clock as it's a
gate for the APMIXED clocks required as a parent for CPU clocks.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Move INFRA_TRNG clock to the bottom of the clk ID to match upstream
linux order. This is in preparation of OF_UPSTREAM.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Rename AUDIO_AWB3 to AUDIO_AWB2 to match upstream linux naming in
preparation for OF_UPSTREAM support.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Fix broken peri_cgs clock with XTAL parents as they have wrong
definition of the parent type.
Correctly fix them and use CLK_PARENT_XTAL for them.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Christian Marangi <ansuelsmth@gmail.com> says:
These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
|
|
Rename each entry from CK to CLK to match the include in upstream kernel
linux.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
|
|
Convert to infracfg gates + muxes implementation now that it's
supported.
Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Replace infracfg clk ID with upstream linux version.
The same format is used here with the factor first, then mux and then
gates.
To correctly reference the gates in clk_gate function, define the
gates_offs value in clk_tree now that they are at an offset from mux and
factor.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Move INFRA_TRNG_CK to the bottom of the list to have a 1:1 match with
upstream linux clock ID.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Comment out CK_TOP_A_TUNER as not used and not defined in upstream
kernel linux. This is to permit support of OF_UPSTREAM and have a 1:1
match with upstream linux clock ID.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Now that we can have advanced parent handling for mux, we can drop
spurious topckgen 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7986.
Drop the factor entry from mt7986-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the apmixed clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for apmixed.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Reorder TOPCKGEN factor ID to put TOP_FACTOR first and then PLL. This is
to match how it's done in upstream kernel linux and in preparation for
OF_UPSTREAM support.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Rename TOPCKGEN factor clock to upstream neaming.
Upstream kernel linux reference the factor clock for apmixedpll with the
"pll" suffix. Align the naming to the upstream naming format in
preparation for OF_UPSTREAM support.
Also rename rtc clock to drop the CB_ as upstream doesn't have that.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Fix a typo for infra_i2c0_ck where 0 was misspelled as O.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Add missing entry for IPCIE_PIPE_CK infra gate clock. Renumber the clock
order to match the expected offset in the gate array.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7986.
Drop the factor entry from mt7986-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for infracfg and topckgen.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Fix wrong parent for INFRA_ADC_26M_CK as should be INFRA_ADC_FRC_CK
instead of INFRA_CK_F26M. This is to match implementation on upstream
kernel linux.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Upstream kernel linux clock include use SYSAXI_D2 instead of 66M_MCK.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Upstream kernel linux clock include use TOP_XTAL instead of CB_CKSQ_40M.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Fix wrong shift for PCIe clocks. This cause the PCIe port to malfunction
as the gate clocks weren't correctly enabled.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Christian Marangi <ansuelsmth@gmail.com> says:
These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
|
|
Rename each entry from CK to CLK to match the include in upstream kernel
linux.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
|
|
Convert to infracfg gates + muxes implementation now that it's
supported.
Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Replace infracfg clk ID with upstream linux version.
The same format is used here with the factor first, then mux and then
gates.
To correctly reference the gates in clk_gate function, define the
gates_offs value in clk_tree now that they are at an offset from mux and
factor.
Drop any comment that reference the clock ID as we now have a 1:1 match
with upstream kernel linux.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Comment out infracfg clk not defined in upstream kernel linux clock ID
include. These clock are not used and can be safely commented. Keep them
just to have a reference of their existence.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Now that we can have advanced parent handling for mux, we can drop
spurious topckgen 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7988.
Drop the factor entry from mt7988-clk.h and reference to them in
mt7988.dtsi. Muxes and gates are updated to reference the apmixed clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for apmixed and topckgen.
Also move TOP_XTAL to the fixed clock table following how it's done in
upstream linux kernel.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Reorder TOPCKGEN factor ID to put TOP_FACTOR first and then PLL. This is
to match how it's done in upstream kernel linux and in preparation for
OF_UPSTREAM support.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Rename TOPCKGEN factor clock to upstream neaming.
Upstream kernel linux reference the factor clock for apmixedpll with the
"pll" suffix. Align the naming to the upstream naming format in
preparation for OF_UPSTREAM support.
Also rename rtc clock to drop the CB_ as upstream doesn't have that.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7988.
Drop the factor entry from mt7988-clk.h and reference to them in
mt7988.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Fix wrong parent for INFRA_PCIE_PERI_26M_CK_P2 as should be
INFRA_PCIE_PERI_26M_CK_P3 instead of INFRA_F26M_O0. This is to match
implementation on upstream kernel linux.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
