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2022-07-26firmware: zynqmp: Change prototype of zynqmp_pmufw_load_config_object()Ashok Reddy Soma
zynqmp_pmufw_load_config_object() has some error cases and it is better to return those errors. Change prototype of this function to return errors. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20220722084658.30995-2-ashok.reddy.soma@xilinx.com
2022-07-26arm64: zynqmp: Enable reset driverAshok Reddy Soma
Enable reset driver for ZynqMP platforms. This will enable us to reset the IP's using generic reset_assert and reset_deassert calls. Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220720095959.29610-4-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26arm64: versal: Enable reset driver for versalMichal Simek
Add CONFIG_DM_RESET and CONFIG_RESET_ZYNQMP configs in versal default configuration to enable support for reset driver for versal platform. Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220720095959.29610-3-ashok.reddy.soma@xilinx.com
2022-07-26reset: zynqmp: Add reset driver support for versalT Karthik Reddy
Add support for versal platform by adding "xlnx,versal-reset" compatible string in zynqmp-reset driver. Reset numbering schema for versal is not same as zynqmp, so nr_reset and reset_id are set to zero. In case of assert/dessert, required device reset id is sent from respective driver through struct reset_ctl. Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220720095959.29610-2-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26xilinx: common: Use strlcpy instead of strncpyMichal Simek
It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com
2022-07-26xilinx: Wire uuid reading from FRUMichal Simek
UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com
2022-07-26serial: zynq: Use DIV_ROUND_CLOSEST() to calcurate divider valueKunihiko Hayashi
Since the calulation of "bgen" is rounded down, using a higher baudrate will result in a larger difference from the actual baudrate. Should use DIV_ROUND_CLOSEST() like the Linux driver. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1657676339-6055-1-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26tools: relocate-rela: Define all macros for e_machine and reloc typesMichal Simek
With some old toolchain not all values should be available that's why better to define all of them to avoid compilation issues. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e2a66854c5506100eb82b5b33cec7f0b5fca1008.1657260903.git.michal.simek@amd.com
2022-07-26tools: relocate-rela: Remove guard around R_AARCH64_RELATIVEMichal Simek
In code you can find out this fragment: 19 #ifndef R_AARCH64_RELATIVE 20 #define R_AARCH64_RELATIVE 1027 21 #endif which means that R_AARCH64_RELATIVE is defined all the time that's why ifdef is not needed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0d40a09ab6edcd88ba3059f7a0b63a819b71256a.1657260903.git.michal.simek@amd.com
2022-07-26dt-bindings: versal: Add versal reset IDsMichal Simek
The same file is already the part of Linux kernel that's why add it also to u-boot to be able to use it in source code and DT files. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1c3bc464536a9bf64a2e8bfe18a938c9cb490620.1657192249.git.michal.simek@amd.com
2022-07-26xilinx: Remove duplicate PMIO_NODE_ID_BASE macroMichal Simek
PMIO_NODE_ID_BASE is defined twice that's why remove one instance. Fixes: 248fe9f302df ("spi: cadence_qspi: Enable apb linear mode for apb read & write operations") Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ce9a601bb99418aa20272d046c74678829d942cc.1657191974.git.michal.simek@amd.com
2022-07-26test/py: Run simple dm commands without checkingMichal Simek
Just to make sure that dm commands can operate. This was the problem on Microblaze in past without fixing manual relocation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/e6c4b8b44445c16cee84436627642ccc9886f507.1657191580.git.michal.simek@amd.com
2022-07-26py: tests: Bind should run only on sandboxMichal Simek
Disable test to run on any other platform than sandbox. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/786bfdfda7dee4494e39c3fff699970ecd623116.1657191142.git.michal.simek@amd.com
2022-07-26arm64: zynqmp: Disable LMB for mini configurationsMichal Simek
There is no need to have LMB enabled that's why save some space by disabling it. aarch64: (for 8/8 boards) all -1168.5 rodata -105.5 text -1063.0 xilinx_zynqmp_mini: all -2013 rodata -185 text -1828 xilinx_zynqmp_mini_qspi: all -2013 rodata -185 text -1828 xilinx_zynqmp_mini_emmc0: all -2661 rodata -237 text -2424 xilinx_zynqmp_mini_emmc1: all -2661 rodata -237 text -2424 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f735d7691f4e7a7958d985b22c40aeb26e37a404.1657183534.git.michal.simek@amd.com
2022-07-26zynqmp: Run board_get_usable_ram_top() only on main U-BootAshok Reddy Soma
With commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location"), the function board_get_usable_ram_top() is allocating MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this much memory in case of mini U-Boot. Keep these functions which use lmb under CONFIG_LMB so that they are compiled and used only when LMB is enabled. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
2022-07-26lmb: Fix lmb property's defination under struct lmbAshok Reddy Soma
Under struct lmb {} the lmb property's should be defined only if CONFIG_LMB_MEMORY_REGIONS is defined. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c24a2b1d6f5db4eb65393f6a77fae129b30b6233.1657183534.git.michal.simek@amd.com
2022-07-26arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLEDMichal Simek
CONFIG_OF_LIBFDT is used twice for guarding the same code. It is enough to do it once that's why remove additional ifdefs from arm and risc-v code. Fixes: 0c303f9a6628 ("image: Drop IMAGE_ENABLE_OF_LIBFDT") Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/r/f8e3ff9124195cbd957874de9a65ef79760ef5e7.1657183634.git.michal.simek@amd.com
2022-07-26arm64: zynqmp: Enable SLG gpo driver by defaultMichal Simek
This device is used on SOM CCs that's why enable it by default. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ebbfc0c883ca7d4f70c75d8d3655aaa6a81d77be.1656943737.git.michal.simek@amd.com
2022-07-26xilinx: zynqmp: Do not use 0 as spl bss start addressStefan Herbrechtsmeier
Do not use 0 as address for memory because of the special meaning for pointers (null pointer). Change the spl bss start address to the second page. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220714134733.7487-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26tools: relocate-rela: Fix ELF decoding on big-endian hostsSamuel Holland
The new ELF decoding logic assumed that the target binary has the same endianness as the host, which broke building ARM64 firmware binaries on big-endian machines. This commit fixes the ELF64 decoding to be host-endianness-neutral, and applies the same changes to the ELF32 decoding. It does not fix the microblaze-specific dynamic symbol decoding. It also corrects the functions used for byte swapping in rela_elf64() and rela_elf32(). The result is the same, but semantically the code is converting bytes read from a foreign-endianness file to host byte order. Fixes: 4c9e2d643460 ("tools: relocate-rela: Read rela start/end directly from ELF") Fixes: a1405d9cfedb ("tools: relocate-rela: Check that relocation works only for EM_AARCH64") Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220715064026.54551-1-samuel@sholland.org Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26mmc: zynq_sdhci: Fix timing macros for MMC High speedAshok Reddy Soma
Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/1656319965-12124-1-git-send-email-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26arm64: zynqmp: Used fixed-partitions for QSPI in k26Michal Simek
Using fixed partitions is recommended way how to describe QSPI. Also add label for qspi flash memory to be able to reference it in future. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a84f7ce8d6472fce66539ba29d31fbaae511d94b.1655732762.git.michal.simek@amd.com
2022-07-26xilinx: Remove the legacy property "#stream-id-cells"Ayan Kumar Halder
"#stream-id-cells" was being used with "mmu-masters" for Xen specific device trees. With Xen commit 2278d2cbb0b7c1b48b298c6c4c6a7de2271ac928 (Link below) Xen is able to support smmu bindings in both formats ie : 1. Using iommus (linux format) 2. Using mmu-masters (legacy format). Thus, "#stream-id-cells" which was used for the legacy format, can be removed as Xen can use smmu bindings in linux format. Link: https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg101649.html Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1e062acb233dee47cd7dd2429cb482132617cbc8.1655886415.git.michal.simek@amd.com
2022-07-25Prepare v2022.10-rc1v2022.10-rc1Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-25configs: Resync with savedefconfigTom Rini
Resync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-25Merge branch '2022-07-25-assorted-platform-updates'Tom Rini
- Assorted TI, Apple, Snapdragon and Xen updates.
2022-07-25drivers: xen: unmap Enlighten page before jumping to LinuxDmytro Firsov
This commit fixes issue with usage of Xen hypervisor shared info page. Previously U-boot did not unmap it at the end of OS boot process. Xen did not prevent guest from this. So, it worked, but caused wierd issues - one memory page, that was returned by memalign in U-boot for Enlighten mapping was not unmaped by Xen (shared_info values was not removed from there) and returned to allocator. During the Linux boot, it uses shared_info page as regular RAM page, which leads to hypervisor shared info corruption. So, to fix this issue, as discussed on the xen-devel mailing list, the code should: 1) Unmap the page 2) Populate the area with memory using XENMEM_populate_physmap This patch adds page unmapping via XENMEM_remove_from_physmap, fills hole in address space where page was mapped via XENMEM_populate_physmap and return this address to memory allocator for freeing. Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com> Reviewed-by: Anastasiia Lukianenko <vicooodin@gmail.com>
2022-07-25arm: Remove unused references to CONFIG_SOC_DM*Tom Rini
There are no references to CONFIG_SOC_DM355 / CONFIG_SOC_DM365 / CONFIG_SOC_DM644X / CONFIG_SOC_DM646X and the files these Makefile lines reference have already been dropped. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-25spl: Use SPL_TEXT_BASE instead of ISW_ENTRY_ADDRAndrew Davis
The ISW_ENTRY_ADDR symbol was used for OMAP devices in place of SPL_TEXT_BASE. Keystone2 HS devices were not using it right either. Remove ISW_ENTRY_ADDR and use SPL_TEXT_BASE directly. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25arm: k3: config.mk: Read software revision information from file on HSAndrew Davis
Read the swrv.txt file from the TI Security Development Tools when TI_SECURE_DEVICE is enabled. This allows us to set our software revision in one place and have it used by all the tools that create TI x509 boot certificates. Signed-off-by: Andrew Davis <afd@ti.com>
2022-07-25k3_gen_x509_cert: Make SWRV configurable for anti-rollback protectionYogesh Siraswar
The x509 certificate SWRV is currently hard-coded to 0. This need to be updated to 1 for j721e 1.1, j7200 and am64x. It is don't care for other k3 devices. Added new config K3_X509_SWRV to k3. Default is set to 1. Signed-off-by: Yogesh Siraswar <yogeshs@ti.com> Reviewed-by: Dave Gerlach <d-gerlach@ti.com>
2022-07-25arm: mach-k3: Remove ROM firewalls on GP devicesAndrew Davis
This isn't strictly needed as these firewalls should all be disabled on GP, but it also doesn't hurt, so do this unconditionally to remove this use of CONFIG_TI_SECURE_DEVICE. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25defconfigs: j721e_hs_evm: Sync HS and non-HS defconfigsAndrew Davis
Additions have been made to the non-HS defconfig without the same being made to the HS defconfig, sync them. Signed-off-by: Andrew Davis <afd@ti.com>
2022-07-25defconfigs: am57xx_hs_evm: Sync HS and non-HS defconfigsAndrew Davis
Sync new additions to non-HS defconfig with HS defconfig. Signed-off-by: Andrew Davis <afd@ti.com>
2022-07-25defconfigs: Add a config for AM43xx HS EVM with QSPI Boot supportAndrew Davis
On AM43xx HS devices, QSPI boot is XIP and we use a single stage bootloader. Add a defconfig for this. Signed-off-by: Andrew Davis <afd@ti.com>
2022-07-25arm: mach-k3: Rename SOC_K3_AM6 to SOC_K3_AM654Andrew Davis
The first AM6x device was the AM654x, but being the first we named it just AM6, since more devices have come out with this same prefix we should switch it to the normal convention of using the full name of the first compatibility device the series. This makes what device we are talking about more clear and matches all the K3 devices added since. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25arm: mach-k3: Only build init files for SPLAndrew Davis
The content of these files are only used in SPL builds. The contents are already ifdef for the same, remove that and only include the whole file in the build when building for SPL. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25arm: dts: db410c/db820c: Fix SPMI addressesStephan Gerhold
The Qualcomm device trees in U-Boot are currently not consistent with the upstream DTs used in the Linux kernel. While some bindings are similar to the official specification in the Linux kernel, several nodes have subtle differences, e.g. the "compatible"s or the exact specification of memory registers. This means that some of the Qualcomm-related U-Boot drivers are not compatible with the Linux DT (and vice versa). The SPMI node is one such example: the "core" region starts at 0x0200f000 in the upstream Linux MSM8916 DT, but in U-Boot it starts at 0x0200f800. The end result is normally the same, since the Linux SPMI driver simply adds the 0x800 internally. However, commit f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support") imported this behavior into the U-Boot driver, without adjusting the DB410c/DB820c device trees. This means that the 0x800 offset is now added twice, breaking all SPMI read/write operations: Failed to find PMIC pon node. Check device tree Failed to find pm8916_gpios@c000 node. USB init failed: -6 starting USB... Bus ehci@78d9000: Failed to find pm8916_gpios@c000 node. probe failed, error -6 No working controllers found While the mistake is strictly speaking in the spmi-msm driver, fix the issue by making the SPMI nodes in the DB410c/DB820c consistent with the upstream Linux DT instead. Ideally we should even go a step further by fixing the remaining uses of custom bindings in the U-Boot drivers and moving to using the Linux DTs as-is. This would likely avoid such mistakes in the future and would also make the porting process much easier. Cc: Dzmitry Sankouski <dsankouski@gmail.com> Fixes: f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25board: ti: am65x: Do not disable SA2UL in DTAndrew Davis
This is no longer needed as the SA2UL can now be shared with Linux. Leave the SA2UL DT node enabled. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25armv8: mach-k3: correct define checking for AM625/AM642 memory mapsMatt Ranostay
Using CONFIG_IS_ENABLED breaks accessing memory map structure when doing a A53 SPL build for AM625 and AM642 platforms. This is due to 'abc if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y'' in which there is no CONFIG_SPL_SOC_K3_AM625/CONFIG_SPL_SOC_K3_AM642 defined in the configuration. For the A53 SPL builds on these platform to access the memory mapping which it will need for enabling the mmu/cache it must use #if defined(X) checks and not CONFIG_IS_ENABLED. Cc: Suman Anna <s-anna@ti.com> Cc: Neha Francis <n-francis@ti.com> Signed-off-by: Matt Ranostay <mranostay@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25arm: dts: mt7622: remove default pinctrl of uart0Weijie Gao
Currently u-boot running on mt7622 will print an warning log at beginning: > serial_mtk serial@11002000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19 It turns out that the pinctrl uclass can't work properly in board_f stage. Since the uart0 is the default UART device used by bootrom, and will be initialized in both bootrom and tf-a bl2. It's ok not to setup pinctrl for uart0 in u-boot. This patch removes the default pinctrl of uart0 to suppress the unwanted warning. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-25arm: dts: k3-am64-ddr fix typo causing DDR4 register corruptionAnand Gadiyar
The entry for DDRSS_PI_321_DATA was accidentally repeated leading to the last few PI registers being incorrectly programmed. Fix this. Reported-by: Bin Liu <b-liu@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-25board: qualcomm: Add support for QCS404 EVBSumit Garg
Add support for Qualcomm QCS404 SoC based evaluation board. Features: - Qualcomm Snapdragon QCS404 SoC - 1GiB RAM - 8GiB eMMC, uSD slot U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/qcs404.rst. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25clocks: qcom: Add clock driver for QCS404 SoCSumit Garg
Currently this clock driver initializes clocks for UART and eMMC. Along with this import "qcom,gcc-qcs404.h" header from Linux mainline to support DT bindings. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25pinctrl: qcom: Add pinctrl driver for QCS404 SoCSumit Garg
Currently this pinctrl driver only supports BLSP UART2 specific pin configuration. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25mmc: msm_sdhci: Add SDCC version 5.0.0 supportSumit Garg
For SDCC version 5.0.0, MCI registers are removed from SDCC interface and some registers are moved to HC. So add support to use the new compatible string "qcom,sdhci-msm-v5". Based on this new msm variant, pick the relevant variant data and use it to detect MCI presence thereby configuring register read/write to msm specific registers. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25board: qualcomm: Add support for dragonboard845cSumit Garg
Add support for 96Boards Dragonboard 845C aka Robotics RB3 development platform. This board complies with 96Boards Open Platform Specifications. Features: - Qualcomm Snapdragon SDA845 SoC - 4GiB RAM - 64GiB UFS drive U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/sdm845.rst, board: dragonboard845c. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25uart: sdm845: Fix debug UART pinmuxSumit Garg
Configure debug UART pins as function: "qup9" rather than being regular gpios. It fixes a hang seen during pinmux setting. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25clocks: sdm845: Import qcom,gcc-sdm845.hSumit Garg
Rather than using magic numbers as clock ids for peripherals import qcom,gcc-sdm845.h from Linux to be used standard macros for clock ids. So start using corresponding clk-id macro for debug UART. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-07-25arm64: dts: sdm845: Remove redundant u-boot DT propertiesSumit Garg
According to u-boot DT recomendation, u-boot specific DT properties belong to *-uboot.dtsi. Also for starqltechn board (which is the only current consumer of sdm845.dtsi), the properties are already included in starqltechn-uboot.dtsi, so remove corresponding redundant properties. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-06 01:47:10 +0000