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Moteen Shah <m-shah@ti.com> says:
This patch series adds the functionality to print the DM firmware
version being used. Before requesting TISCI for the DM version we
first check if the DM split mode capability exists, if yes, we proceed
onto making the call to TISCI for retrieving the version information.
DM split mode capability indicates that the DM is a separate binary
altogether and has its own versioning information similar to TIFS.
Boot Logs: https://gist.github.com/Jamm02/37864f605445944a0c0caf426e0aba50
Link: https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/general/core.html#tisci-msg-query-fw-caps
Link: https://lore.kernel.org/r/20250609081434.1000377-1-m-shah@ti.com
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Beleswar Padhi <b-padhi@ti.com> says:
This series adds remoteproc support on MCU R5F in Split mode.
During boot, ROM can bring up the boot R5F cores in either lockstep or
split mode based on X509 certificate flags. If booted in lockstep mode,
the MCU R5F cores will run first the R5 SPL, and then once A72 comes up,
will run the Device Manager (DM) firmware. But if booted in split mode, core
0 will run DM firmware and second core sits in WFI. Shut it down so that
other firmwares can later be loaded on them.
The shutdown of MCU R5 Core 1 is invoked at A72 SPL init, as by that
time Device Manager (DM) is up and running on R5 Core 0. The shutdown
of MCU R5 Core 1 is handled by Device Manager itself.
Test logs:
https://gist.github.com/3V3RYONE/ee8e3cb9aa5f4c5c00b059b9c14bfa98
Link: https://lore.kernel.org/r/20250609081429.1724643-1-b-padhi@ti.com
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Martin Schwan <m.schwan@phytec.de> says:
This series implements a new bootmeth for RAUC A/B systems. RAUC (Robust
Auto Update Controller) is a lightweight update client, providing "Safe
and Secure OTA Updates for Embedded Linux". See the following links for
more information about RAUC:
https://rauc.io/
https://rauc.readthedocs.io/en/latest/
PHYTEC uses RAUC in its Yocto based distribution "Ampliphy" as the
default way of updating embedded devices based on PHYTEC hardware. So
far, the logic selecting the correct partitions and files to boot was
being implemented in the U-Boot environment. While this is a
straightforward way to do it, adding and supporting new platforms became
somewhat tedious and is platform-specific. The introduction of U-Boot's
"Standard Boot" provided a convincing alternative, promising a simpler
and more portable way of booting, even for RAUC systems. This led me to
implement a new bootmeth supporting RAUC A/B systems. Note, that this
new bootmeth is not proprietary to PHYTEC products and is designed to
work on other hardware with a RAUC A/B system, too.
The bootmeth currently only supports symmetric A/B partitioning layouts.
E.g. A/rescue is not (yet) supported. The partition indexes and default
slot tries can be specified via configuration options.
For now, the bootmeth_rauc uses a similar approach for loading the
Kernel and device tree as the bootmeth_script, in that it requires a FIT
containing a U-Boot script loading the desired distro. It could be
possible to support booting without a script and load the Kernel and DT
directly with this bootmeth, but I found the script method to be very
flexible for now, in letting the distro decide what to load.
The bootmeth_rauc was tested on a phyBOARD-Pollux i.MX8M Plus [1] with
BSP-Yocto-Ampliphy-i.MX8MP-PD24.1.2 [2].
Supported boot devices are currently only MMC devices, but it should be
possible to add SPI flashes in the future.
To test this patch stack with PHYTEC's phyBOARD-Pollux i.MX8M Plus
board, you need to adjust the boot files to include the boot.scr.uimg
containing the distro's boot script and set "optargs" to "${raucargs}"
in it. Also disable any legacyboot in the U-Boot environment and simply
boot with Standard Boot:
bootmeth order rauc
bootflow scan -lb
[1]: https://www.phytec.eu/en/produkte/single-board-computer/phyboard-pollux/
[2]: https://download.phytec.de/Software/Linux/BSP-Yocto-i.MX8MP/BSP-Yocto-Ampliphy-i.MX8MP-PD24.1.2/
Link: https://lore.kernel.org/r/20250604-wip-bootmeth-rauc-v3-0-f9fad913c57e@phytec.de
[trini: Don't enable by default]
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Print DM firmware's version in the boot up process of K3 devices,
having DM capability(DM as a separate binary).
Signed-off-by: Moteen Shah <m-shah@ti.com>
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Add a function to print version of the DM firmware in use.
The function queries the firmware capabilities first and if
DM split mode bit is set, sends a request to TISCI for
retrieving the version information.
The DM split mode bit indicates that DM is a separate binary
altogether and hence it will have its own versioning.
Signed-off-by: Moteen Shah <m-shah@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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Add a function to retrieve information of the DM firmware's ABI versions,
RM/PM HAL, firmware version, etc using TI_SCI protocol.
Signed-off-by: Moteen Shah <m-shah@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
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Add a new function to query the capabilities of the DM firmware, using
TI SCI protocol to retrieve a 64-bit firmware capability, where each bit
represents a specific capability supported by the firmware.
Signed-off-by: Moteen Shah <m-shah@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
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Introduce response and request structs to receive and request
information regarding DM version, etc from TI SCI.
Signed-off-by: Moteen Shah <m-shah@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
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Introduce response and request structs for receiving information
regarding FW/SOC capability from DM. The received capability can
further be used to call certain API's based on the feature supoorted
by the DM firmware.
Signed-off-by: Moteen Shah <m-shah@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
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Link the default firmware in the environment variable for MCU R5 core1
for all J7 platforms.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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Acquire processor control before doing core reset operations in probe
routine. Release the control afterwards, so that it can be acquired
during core loading operations.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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During boot, ROM can bring up the MCU R5F cores in either lockstep or
split mode based on X509 certificate flags. If booted in split mode,
core 0 will run DM firmware and second core sits in WFI. Add support to
shut down core 1 so that other firmwares can later be loaded on them.
The shutdown of MCU R5 Core 1 is invoked at A72 SPL init, as by that
time Device Manager (DM) is up and running on R5 Core 0. The shutdown
request of Core 1 is handled by Device Manager itself.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
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Currently the MCU R5 processor ids and device ids are only defined for
R5 SPL Stage. Expose these ids always so that A72 SPL can utilize this
information to shutdown MCU R5 Core 1 when booted in Split mode.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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Add documentation for the bootmeth "rauc", which boots an A/B system
with RAUC from MMC.
Signed-off-by: Martin Schwan <m.schwan@phytec.de>
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Add a bootmeth driver which supports booting A/B system with RAUC as
their update client.
Signed-off-by: Martin Schwan <m.schwan@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
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Rasmus Villemoes <ravi@prevas.dk> says:
While looking through list.h, I saw that the regular list_* helpers
(and one of the hlist_* ones) still contain the prefetch() that was
removed in linux 14 years ago. It doesn't do anything, but makes the
macros harder to read, so get rid of it, and the fallback, no-op
definition that they relied on. That requires removing a few uses
outside list.h as well.
checkpatch warns about some whitespace issues in list.h, but as I've
copied whole kerneldoc+#define blocks directly from the linux kernel,
I think it's better to just accept that so that we don't introduce
needless diffs. The "macro argument reuse" arguments should also be
ignored, as e.g. the "member" arguments are obviously always just bare
identifiers, and the "pos" arguments must be assigned to multiple
times.
Link: https://lore.kernel.org/r/20250507121246.518691-1-ravi@prevas.dk
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None of the list helpers use prefetch() anymore, and no C code relies
on getting this definition from list.h. In any case, such an arch/cpu
specific thing does not belong in a header that just consists of cpp
helper macros.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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AFAICT, CONFIG_CPU_HAS_PREFETCH has never existed as a proper Kconfig
symbol in U-Boot, nor has any board include file ever defined it.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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These all end up using the no-op prefetch() defined in linux/list.h,
because the only possible real implementation is in
arch/mips/include/asm/processor.h, which is behing
CONFIG_CPU_HAS_PREFETCH which is nowhere defined.
In order to be able to drop that fallback definition from list.h,
first remove all uses.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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The use of prefetch() in these list helpers was dropped back in 2011
in linux (e66eed651fd1 ("list: remove prefetching from regular list
iterators")). No arch in U-Boot defines any actual prefetch(), and as
the referenced commit says, it's usually not a win anyway.
Whole-sale sync of list.h is not really feasible, but we can
synchronize the macros containing a prefetch() with their linux
implementations as of v6.15-rc5, also importing the various helpers
needed, e.g. list_is_head() and list_next_entry().
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/26728
- Add support for imx28 BTT boards.
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The btt[c3] devices are based on imx287 SoC.
U-Boot SPL 2025.04-01081-g07e086681d26 (Apr 16 2025 - 12:24:36 +0200)
Trying to boot from MMC1
U-Boot 2025.04-01081-g07e086681d26 (Apr 16 2025 - 12:24:36 +0200)
CPU: Freescale i.MX28 rev1.2 at 454 MHz
BOOT: SSP SPI #3, master, 3V3 NOR
Model: BTT3
Board: LWE BTT SoM HW rev 0
DRAM: 256 MiB
Core: 86 devices, 15 uclasses, devicetree: separate
MMC: MXS MMC: 0
Loading Environment from SPIFlash... SF: Detected is25lp128 with page
size 256 Bytes, erase size 64 KiB, total 16 MiB
OK
In: serial@80074000
Out: serial@80074000
Err: serial@80074000
Net: eth0: ethernet@800f0000
Hit any key to stop autoboot: 0
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-20250616
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/26704
Usb gadget:
- Atmel: Improve gadget disconnect stability by power cycling
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https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-20250616
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/26704
Usb gadget:
- Fix ti_musb driver in gadget mode (with DM_USB_GADGET)
DFU:
- mmc/scsi backends when using 10 or more partitions
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Contrary to the datasheet, setting both DETACH and PULLD_DIS bits to 1
does not always drive the DP and DM lines to high-impedance. This
prevents the host from reliably detecting a USB disconnect and subsequent
reconnect.
The symptom is that the first gadget command (e.g., dhcp) succeeds, while
subsequent commands (e.g., nfs) fail.
Disabling and re-enabling the controller entirely, instead of toggling the
PULLD_DIS bit, reliably generates a disconnect event.
The Linux driver works correctly because gadget_disconnect/gadget_connect
are always followed by gadget_udc_start/gadget_udc_stop. In U-Boot
pullup() is used solely.
This behavior has been observed on the SAM9X60-Curiosity and
AT91SAM9G25-EK boards and has been reported to Microchip.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Link: https://lore.kernel.org/r/20250602-pullup-v1-1-edcde5a050dd@hifiphile.com
[mkorpershoek: reworded commit title + comment to usba_udc_pullup()]
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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Remove duplicate .ops assignment that was overriding the correct
ti_musb_gadget_ops with musb_usb_ops (host ops) in the ti_musb_peripheral
driver. This was causing U-Boot crashes when trying to call the
handle_interrupts operation since the wrong ops structure was being used.
Fixes: 7d98dbcc3dc ("usb: musb-new: Add support for DM_USB")
Fixes: 281eaf1ed83a ("usb: gadget: musb: Convert interrupt handling to usb_gadget_generic_ops")
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20250611171031.840277-1-kory.maincent@bootlin.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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The third_arg for a dfu alt is read as an integer and is overloaded for
different supported backends. For ext4 and fat, this third_arg
represents the partition and forms the dev part string, which should
have its partition in hex. This commit fixes dfu ext4/fat usage for
devices with ten or more partitions.
Signed-off-by: Ivan Pang <ipman@amazon.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Link: https://lore.kernel.org/r/20250611050127.38011-1-ipman@amazon.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2025.07-rc5:
- configs: rpi: set NR_DRAM_BANKS to 8 to accommodate RAM on 16GB models
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Writing to eMMC on RK3528 is affected with the same or a similar issue
as on RK3588, where eMMC must init to HS200 at least once to fully work.
Trying to write u-boot-rockchip.bin to eMMC fails with:
=> mmc write $fileaddr 40 5000
MMC write: dev # 0, block # 64, count 20480 ... mmc write failed
0 blocks written: ERROR
For U-Boot to enable HS200 mode the mmc-hs200-1_8v prop must be defined
in the device tree. Linux does not seem to be affected and is able to
detect and use HS200 without this prop.
Enable use of HS200 and fix eMMC write on RK3528 by adding the missing
mmc-hs200-1_8v prop for affected boards:
=> mmc write $fileaddr 40 5000
MMC write: dev # 0, block # 64, count 20480 ... 20480 blocks written: OK
Fixes: b112a44531cb ("board: rockchip: Add minimal generic RK3528 board")
Fixes: ccbddf645310 ("board: rockchip: Add Radxa E20C")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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Raspberry Pi 5 can now have up to 16 GiB of RAM where the memory spans 8
DRAM banks in total. Increase the config value to 8 to initialize the
whole RAM. Without this change, kernel only sees 8 GiB of RAM on the 16
GiB CM5 as reported in [1].
[1] https://github.com/home-assistant/operating-system/issues/3989
Signed-off-by: Jan Čermák <sairon@sairon.cz>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
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6.15 + winbond"
Christian Marangi <ansuelsmth@gmail.com> says:
This small series sync linux/bitfield.h from Linux 6.15 and fix all
the compilation error due to a change in the header include.
The sync is needed to make it easier to support the winbond changes.
The changes are CI test with [1]
[1] https://github.com/u-boot/u-boot/pull/777
Link: https://lore.kernel.org/r/20250607211133.2005-1-ansuelsmth@gmail.com
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Add Winbond W25N04KV flash support that use a different value to detect
ECC bitflip.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Sync bitfield.h header with Linux 6.15 version. Mainly is to permit the
introduction of FIELD_PREP_CONST. The bug.h header changed to
build_bug.h doesn't cause any regression as we also ship split header
similar to how it's done with in Linux.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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The GENMASK/GENMASK_ULL macro requires inclusion of linux/bitops.h
header. It does currently work as bitfield.h includes it indirectly
but this will change when bitfield.h will be synced with new Linux
version.
Also raw printf require linux/bug.h header (also currently included
indirectly by bitfield.h)
Explicitly include the headers to fix future compilation error.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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The WARN macro requires inclusion of linux/bug.h header. It does
currently work as bitfield.h includes it indirectly but this will
change when bitfield.h will be synced with new Linux version.
Explicitly include the header to fix future compilation error.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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The WARN macro requires inclusion of linux/bug.h header. It does
currently work as bitfield.h includes it indirectly but this will
change when bitfield.h will be synced with new Linux version.
Explicitly include the header to fix future compilation error.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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E Shattow <e@freeshell.de> says:
Make consistent use of lowercase hexadecimal prefix '0x' throughout U-Boot.
There are a few remaining uses of uppercase 'X' to denote hexadecimal prefix
or placeholder in documentation and error messages.
External devicetree-rebasing dts/upstream and the generated code of
xilinx/zynq are ignored for the series.
Link: https://lore.kernel.org/r/20250606224558.1117422-1-e@freeshell.de
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Use consistent lowercase hex prefix style in include/*
Signed-off-by: E Shattow <e@freeshell.de>
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Use consistent lowercase hex prefix style in arch/*
Signed-off-by: E Shattow <e@freeshell.de>
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Use consistent lowercase hex prefix style in lib/*
Signed-off-by: E Shattow <e@freeshell.de>
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Use consistent lowercase hex prefix style in tools/*
Signed-off-by: E Shattow <e@freeshell.de>
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Use consistent lowercase hex prefix style in drivers/*
Does not change hex prefix case in allcaps uppercase style error messages
Signed-off-by: E Shattow <e@freeshell.de>
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Use consistent lowercase hex prefix style in board/*
Does not change auto-generated files in xilinx/zynq/*/ps7_init_gpl.c
Signed-off-by: E Shattow <e@freeshell.de>
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Use consistent lowercase hex prefix style in configs/*
Signed-off-by: E Shattow <e@freeshell.de>
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Rasmus Villemoes <ravi@prevas.dk> says:
There's really no reason for the gd pointer to have the volatile
qualifier.
In fact, I claim that it's completely unnecessary and just pessimizes
code generation and forces ugly casts in lots of places. For example,
see the casts in drivers/core/tag.c where elements are added to
gd->dm_taglist, or a helper such as cyclic_get_list() that should not
be needed.
Also, it is what ends up standing in the way of an otherwise
innocent code cleanup of list.h:
https://lore.kernel.org/u-boot/20250522165656.GB2179216@bill-the-cat/
Note that riscv, x86 as well as arm64 with LTO enabled has not had
this volatile qualifier, so it's unlikely there's any generic code
that depends on it.
Link: https://lore.kernel.org/r/20250604195612.2312979-1-ravi@prevas.dk
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It's slightly ironic that riscv at very first had the gd pointer
volatile qualified [6020faf62c3 ("riscv: nx25: include: Add header
files to support RISC-V")], removed that back in 2018
[40717eb849c ("riscv: checkpatch: Fix use of volatile")], and then in
2020 this helper was added [6b9966e1aa3 ("riscv: define function
set_gd()")] which needlessly had volatile in the prototype.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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The global gd pointer is no longer volatile-qualified. Callers of this
helper function have been updated to no longer use volatile-qualifed
temporary variables, so update the prototype accordingly.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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The global gd pointer is no longer volatile-qualified, so drop that
qualifier from these bookkeeping variables.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
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The global gd pointer is no longer volatile-qualified, so drop that
qualifier from these bookkeeping variables.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Now that the global gd pointer is no longer volatile-qualified,
there's no reason for the temporary variables used for
saving/restoring it to have that qualifier.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Tested-by: Anshul Dalal <anshuld@ti.com>
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