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2021-07-07Merge tag 'u-boot-atmel-fixes-2021.10-a' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel fixes for 2021.10 cycle: This small fixes set is dedicated to fixing the onewire subsystem for the at91 boards which was broken since 2020.04.
2021-07-06Merge branch '2021-07-06-platform-updates'Tom Rini
- mpc8379erdb DM_USB, DM_PCI and DM_ETH support. - Drop PCI support from the integrator family of boards - Add synquacer support - Assorted lpc32xx updates and improvements - snapdragon (and related) fixes, Broadcom iproc update
2021-07-06arm: dts: db410c: Add missing cd-gpios for SD card detectionStephan Gerhold
It looks like SD card detection is broken at the moment for DB410c. The eMMC is detected correctly, but the SD card is not. This is probably similar to the issue fixed in commit 850514740358 ("mmc: msm_sdhci: Use mmc_of_parse for setting host_caps") for eMMC, except that the SD card does not have a property like "non-removable" that skips the card detection. The SDHCI on DB410c cannot detect itself if a SD card is inserted, so add the necessary cd-gpios to make SD card detection work again. While at it, fix the #gpio-cells for the soc_gpios to avoid DTC warnings - the soc_gpios are actually already used with two cells for the gpio-leds so this was just wrong all the time. Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06arm: snapdragon: Fix typo in clk_bcr_update()Sheep Sun
Fix typo in clock-snapdragon.c Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
2021-07-06arm: snapdragon: Use correct GICC register on APQ8016Sheep Sun
The GICC register used by u-boot is 0x0a20c000, which is actually a GICC for WCNSS, the WLAN processor. U-boot runs on the Application Processor, therefore it should use APCS GICC instead. Hence, correct it with APCS GICC register address. Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
2021-07-06arm: lpc32xx: add EA LPC3250 DevKitv2 board supportTrevor Woerner
Add basic support for running U-Boot on the Embedded Artists LPC3250 Developer's Kit v2 board by launching U-Boot from the board's s1l loader (which comes pre-installed on the board). Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2021-07-06lpc32xx: import device tree from LinuxTrevor Woerner
Import the dtsi, dts, and clock binding files for the lpc32xx ea3250 board directly and unmodified from the latest Linux kernel. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2021-07-06lpc32xx: Kconfig: switch to CONFIG_CONS_INDEXTrevor Woerner
There's nothing special or unique to the lpc32xx that requires its own config parameter for specifying the console uart index. Therefore instead of using the lpc32xx-specific CONFIG_SYS_LPC32XX_UART include parameter, use the already-available CONFIG_CONS_INDEX from Kconfig. Signed-off-by: Trevor Woerner <twoerner@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-06board: synquacer: Add DeveloperBox 96boards EE supportMasami Hiramatsu
Add the DeveloperBox 96boards EE support. This board is also known as Socionext SynQuacer E-Series. It contians one "SC2A11" SoC, which has 24-cores of arm Cortex-A53, and 4 DDR3 slots, 3 PCIe slots (1 4x port and 2 1x ports which are expanded via PCIe bridge chip), 2 USB 3.0 ports and 2 USB 2.0 ports, 2 SATA ports and 1 GbE, 64MB NOR flash and 8GB eMMC on standard MicroATX Form Factor. For more information, see this page; https://www.96boards.org/product/developerbox/ Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-07-06ARM: dts: synquacer: Add device trees for DeveloperBoxMasami Hiramatsu
Add device trees for 96boards EE DeveloperBox and basement SynQuacer SoC dtsi. These files are imported from EDK2 commit 83d38b0b4c0f240d4488c600bbe87cea391f3922 as-is (except for the changes #include path and some macros). And add U-Boot specific changes in synquacer-sc2a11-developerbox-u-boot.dtsi Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-07-06gpio: Introduce CONFIG_GPIO_EXTRA_HEADER to cleanup #ifdefsMasami Hiramatsu
Since some SoCs and boards do not hae extra asm/arch/gpio.h, introduce CONFIG_GPIO_EXTRA_HEADER instead of adding !define(CONFIG_ARCH_XXXX) in asm/gpio.h. Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-07-06arm: iproc: Add higher speed configurationsChris Packham
Add support for 1.3GHz, 1.35GHz and 1.4GHz parts. This is based on equivalent code in Broadcom's LDK 5.0.6. Signed-off-by: Chris Packham <judge.packham@gmail.com>
2021-07-06ARM: dts: at91: fix the GPIO polarity for onewireEugen Hristev
The GPIO polarity for onewire must be GPIO_ACTIVE_HIGH. On previous versions this used to work as it looks like the right flag values are being passed since : https://lists.denx.de/pipermail/u-boot/2020-April/407195.html And that series broke the old functionality for onewire nodes. Some boards had the correct value for the polarity, but it wasn't clear so I replaced it with the right macro for the flag, instead of an empty value. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-07-06board: sl28: add DSA support for variant 2Michael Walle
Now that u-boot gained DSA support, and it is already enabled for the kontron_sl28 board, add the last missing piece and enable the corresponding devices it in the device tree. Signed-off-by: Michael Walle <michael@walle.cc>
2021-07-06arm: dts: ls1028a: disable enetc-2 by defaultVladimir Oltean
The enetc-2 port is used as DSA master (connected back-to-back to mscc_felix_port4). Since the convention is to not enable ports in the common SoC dtsi unless they are used on the board, then enable enetc-2 only when mscc_felix_port4 itself is enabled. All existing device trees appear to adhere to this rule, so disable enetc-2 in the SoC dtsi. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06arm: dts: ls1028a: declare the fixed-link speeds for the internal ENETC portsVladimir Oltean
To comply with the device tree bindings expectations for an Ethernet controller, as well as to simplify the driver code, declare fixed-link nodes for the internal ENETC ports (attached to the mscc_felix switch). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06arm: dts: ls1028a: enable internal RGMII delays for the LS1028A-QDS AR8035 PHYVladimir Oltean
There are no PCB trace delays on this board, so the PHY needs to enable its internal ones in order to have a proper electrical connection to the enetc MAC. Fixes: b32e9a757837 ("arm: dts: ls1028a updates for network interfaces") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06arm: dts: ls1028a: enable the switch CPU port for the LS1028A-QDSVladimir Oltean
Due to an upstream change, the ls1028a.dtsi bindings for the mscc_felix switch got accepted with all ports disabled by default and with no link to the DSA master - this needs to be done on a per board basis. Note that enetc-2 is not currently disabled in the ls1028a.dtsi, but presumably at some point it might become. Explicitly enable it in the QDS device trees anyway, to proactively avoid issues when that happens. Fixes: a7fdac7e2a2a ("arm: dts: ls1028a: define QDS networking protocol combinations") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-01Merge tag 'xilinx-for-v2021.10' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.10 clk: - Add driver for Xilinx Clocking Wizard IP fdt: - Also record architecture in /fit-images net: - Fix plat/priv data handling in axi emac - Add support for 10G/25G speeds pca953x: - Add missing dependency on i2c serial: - Fix dependencies for DEBUG uart for pl010/pl011 - Add setconfig option for cadence serial driver watchdog: - Add cadence wdt expire now function zynq: - Update DT bindings to reflect the latest state and descriptions zynqmp: - Update DT bindings to reflect the latest state and descriptions - SPL: Add support for ECC DRAM initialization - Fix R5 core 1 handling logic - Enable firmware driver for mini configurations - Enable secure boot, regulators, wdt - Add support xck devices and 67dr - Add psu init for sm/smk-k26 SOMs - Add handling for MMC seq number via mmc_get_env_dev() - Handle reserved memory locations - Add support for u-boot.itb generation for secure OS - Handle BL32 handoffs for secure OS - Add support for 64bit addresses for u-boot.its generation - Change eeprom handling via nvmem aliases
2021-06-28Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh ↵Tom Rini
into next - V3U Falcon board support
2021-06-28Merge tag 'v2021.07-rc5' into nextTom Rini
Prepare v2021.07-rc5 # gpg: Signature made Mon 28 Jun 2021 03:39:36 PM EDT # gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C # gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate] # Conflicts: # configs/am64x_evm_r5_defconfig
2021-06-28arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=yKunihiko Hayashi
If both POSITION_INDEPENDENT and SYS_RELOC_GD_ENV_ADDR are enabled, wherever original env is placed anywhere, it should be relocated to the right address. Relocation offset gd->reloc_off is calculated with SYS_TEXT_BASE in setup_reloc() and env address gd->env_addr is relocated by the offset in initr_reloc_global_data(). gd->env_addr = (orig env) + gd->reloc_off = (orig env) + (gd->relocaddr - SYS_TEXT_BASE) However, SYS_TEXT_BASE isn't always runtime base address when POSITION_INDEPENDENT is enabled. So the relocated env_addr might point to wrong address. For example, if SYS_TEXT_BASE is zero, gd->env_addr is out of memory location and memory exception will occur. There is a difference between linked address such as SYS_TEXT_BASE and runtime base address. In _main, the difference is calculated as "run-vs-link" offset. The env_addr should also be added to the offset to fix the address. gd->env_addr = (orig env) + ("run-vs-link" offset) + gd->reloc_off = (orig env) + (SYS_TEXT_BASE - _start) + (gd->relocaddr - SYS_TEXT_BASE) = (orig env) + (gd->relocaddr - _start) Cc: Marek Vasut <marex@denx.de> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de>
2021-06-28arm64: dts: zynqmp: Add psgtr and phy entry for USB and SATA nodePiyush Mehta
This patch adds psgtr clocks and phy entry for USB0, USB1 and SATA node for zc1751-xm017-dc3 board. Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-25Merge tag 'u-boot-imx-20210625' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2021.07 ----------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7903
2021-06-24ARM: rmobile: beacon: Set CONFIG_RZ_G2 on Beacon boardsAdam Ford
The board detection is incorrectly stating it's an rcar3 variant instead of an RZ/G2 variant on all the r8a774*1_beacon boards. Set the flag to correctly display as RZ/G2[M/N/H] Signed-off-by: Adam Ford <aford173@gmail.com>
2021-06-24ARM: rmobile: Add basic PSCI support for R8A779A0 V3U FalconHai Pham
Enable basic PSCI support for R8A779A0 V3U Falcon Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24ARM: renesas: Add R8A779A0 V3U Falcon board codeHai Pham
Add board code for the R8A779A0 V3U Falcon board. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> -- Marek: - various small rebase fixes and clean ups
2021-06-24ARM: renesas: Add R8A779A0 V3U platform codeHai Pham
Add platform code to support R8A779A0 V3U SoC. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24ARM: dts: renesas: Add RPC node to R8A779A0 V3UMarek Vasut
The R-Car V3U does support RPC interface, however the support for it is missing in upstream Linux DTs as of commit 9f4ad9e425a1 ("Linux 5.12"), add the node into u-boot.dtsi to let U-Boot access the SPI NOR or HF. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24ARM: dts: renesas: Add R8A779A0 V3U DT extrasHai Pham
Add R8A779A0 V3U DT extras for U-Boot. Based on "ARM: dts: renesas: Add R8A779A0 V3U DTs" by Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24ARM: dts: renesas: Add R8A779A0 V3U Falcon DTsMarek Vasut
Import R8A779A0 V3U Falcon DTs from Linux 5.12, commit 9f4ad9e425a1 ("Linux 5.12") . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24ARM: dts: renesas: Add R8A779A0 V3U DTs and headersMarek Vasut
Import R8A779A0 V3U DTs and headers from Linux 5.12, commit 9f4ad9e425a1 ("Linux 5.12") . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-23global_data: Ensure we have <config.h> when symbols are not in Kconfig yetTom Rini
All symbols that are defined in Kconfig will always be defined (or not) prior to preprocessing due to the -include directive while building. However, symbols which are not yet migrated will only be defined (or not) once the board config.h is included, via <config.h>. While the end goal must be to migrate all symbols, today we have cases where the size of gd will get mismatched within the build, based on include order. Mitigate this by making sure that any <asm/global_data.h> that uses symbols not in Kconfig does start with <config.h>. Remove this when not needed. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: Huan Wang <alison.wang@nxp.com> Cc: Angelo Dureghello <angelo@sysam.it> Cc: Rick Chen <rick@andestech.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-23arm64: zynqmp: Add missing year in Kria dts filesMichal Simek
DT files have been added this year but forgot to update it that's why do it in separate patch now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Add psgtr description to zc1751 dc1 boardMichal Simek
Wire psgtr for zc1751 dc1 board. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Remove gpio from aliases listMichal Simek
It is not recommended to have aliases for gpio. In past it was used in Linux for assigning numbers via sysfs which is deprecated and libgpiod should be used instead. In U-Boot this number is used for seq number but gpio offset are not counted from this number. That's why having these aliases only for seq number is not needed. As is done in Linux it is the best to use full gpio name instead of sequence number which depends on sequence in binding. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Enable USB3.0 for dc2/dc3Michal Simek
Both boards are usb3.0 capable. dc3 was also missing enabling dwc3* nodes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Update usb dwc3 DT descriptionMichal Simek
Align USB nodes with the latest dt-bindings. It is adding resets, new interrupt and also some quirks. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Use overlay sugar syntax for Kria SOMMichal Simek
dtc supports new sugar syntax which is easier compare to previous one that's why also covert overlays for SOM to it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Remove revA compatibility string from kv260 revB/1Michal Simek
kv260-revB is different compare to revA (usbhub is wired via i2c) that's why remove revA compatible string. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Add support for 64bit addresses in itsMichal Simek
Xilinx ZynqMP supports also addresses above 4GB (32bit) that's why also generate u-boot.its with 64bit load/entry addresses to also support different configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Sync psgtr location on zcu104/zcu111/zc1751-dc1Michal Simek
psgtr node should be below pinctrl for easier comparion among dts files. That's why move that nodes to different location. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Remove information about dma clock on zcu106Michal Simek
Clock setting is not static anymore that's why it depends on firmware setup that's why remove this comment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Remove unused property from SD/USBMichal Simek
Linux kernel is not using these properties that's why they can be removed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Remove can aliases from zc1751Michal Simek
Networking subsystem is not using aliases that's why remove them for CAN devices. There is also no any other Xilinx ZynqMP DT file with them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Remove si5328 and si5382 nodesMichal Simek
There are no drivers for these devices that's why remove that nodes completely. This change is done based on Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com
2021-06-23xilinx: Convert xlnx,eeprom property to nvmem aliasMichal Simek
Convert all boards to use nvmem alias instead of xlnx,eeprom. The change is done based on discussion in the link below. Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: rtc: Update rtc calibration valueSrinivas Neeli
As per the design specification "The 16-bit Seconds Calibration Value represents the number of Oscillator Ticks that are required to measure the largest time period that is less than or equal to 1 second. For an oscillator that is 32.768 KHz, this value will be 0x7FFF." Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Sync psgtr location on zcu100/zcu106Michal Simek
psgtr node should be below pinctrl for easier comparion among dts files. That's why move that nodes to different location. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Sync dp port location on zc1751 dc4Michal Simek
Historically dpdma and dpsub are placed at the end of files. Move nodes there for easier comparison among dts files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-09-23 13:17:59 +0000